DP83251 datasheet(37/96 Pages) NSC

37 / 96 page

50 Registers (Continued)

RECEIVE CONDITION MASK REGISTER B (RCMRB)

The Receive Condition Mask Register B allows the user to dynamically select which events will generate an interrupt

The Receiver Condition B bit (RCB) of the Interrupt Condition Register (ICR) will be set to 1 when one or more bits within the

Receive Condition B (RCRA) is set to 1 and the corresponding mask bits in this register is also set to 1

Since this register is cleared (ie set to 0) during the reset process all interrupts are initially masked

ACCESS RULES

ADDRESS

READ

WRITE

0Ch

Always

RES

SILSM

EBOUM

CSEM

LSUPVM

ALSM

STM

ILSM

Bit

Symbol

Description

ILSM

IDLE LINE STATE MASK

The mask bit for the Idle Line State bit (ILS) of the

Receive Condition Register B (RCRB)

STM

STATE THRESHOLD MASK

The mask bit of the State Threshold bit (ST) of

the Receive Condition Register B (RCRB)

ALSM

ACTIVE LINE STATE MASK

The mask bit for the Active Line State bit (ALS)

of the Receive Condition Register B (RCRB)

LSUPVM

LINE STATE UNKNOWN

PHY VALID MASK

The mask bit for the Line

State Unknown

PHY Valid bit (LSUPV) of the Receive Condition Register B

(RCRB)

CSEM

CASCADE SYNCHRONIZATION ERROR MASK

The mask bit for the

Cascade Synchronization Error bit (CSE) of the Receive Condition Register B

(RCRB)

EBOUM

ELASTICITY BUFFER OVERFLOWUNDERFLOW MASK

The mask bit for

the Elasticity Buffer OverflowUnderflow bit (EBOU) of the Receive Condition

SILSM

SUPER IDLE LINE STATE MASK

The mask bit for the Super Idle Line State

bit (SILS) of the Receive Condition Register B (RCRB)

RESM

RESERVED MASK

The mask bit for the Reserved bit (RES) of the Receive

Condition Register B (RCRB)

DP83251 Datasheet(PDF) 37 Page - National Semiconductor (TI)

DP83251 Datasheet(HTML) 37 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

Datasheet Download

Link URL