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DP83251 Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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DP83251 Datasheet(HTML) 11 Page - National Semiconductor (TI) |
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11 / 96 page ![]() 30 Functional Description (Continued) 33 CONFIGURATION SWITCH The Configuration Switch consists of a set of multiplexors and latches which allow the PLAYER device to configure the data paths without the need of external logic The Con- figuration Switch is controlled through the Configuration Register (CR) The Configuration Switch has four internal buses the A Request bus the B Request bus the Receive bus and the PHY Invalid bus The two Request buses can be driv- en by external input data connected to the external PHY Port Interface The Receive bus is internally connected to the Receive Block of the PLAYER device while the PHY Invalid bus has a fixed 10-bit LSU pattern useful during the connection process The configuration switch also has three internal multiplexors each can select any of the four buses to connect to its respective data path The first two are PHY Port Interface output data paths A Indicate and B Indicate that can drive output data paths of the external PHY Port Interface The third output data path is connected internally to the Transmit Block The Configuration Switch is the same on both the DP83251 device and the DP83255 device However the DP83255 has two PHY Port interfaces connected to the Configuration Switch whereas the DP83251 has one PHY Port Interface The DP83255 uses the A Request and A Indicate paths as one PHY Port Interface and the B Request and B Indi- cate paths as the other PHY Port interface (see Figure 3- 5a ) The DP83251 having only one port interface uses the B Request and A Indicate paths as its external port The A Request and B Indicate paths of the DP83251 are null connections and are not used by this device (see Figure 3- 5b ) TLF10386 – 7 FIGURE 3-5a Configuration Switch Block Diagram for DP83255 TLF10386 – 34 FIGURE 3-5b Configuration Switch Block Diagram for DP83251 11 |
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