DP83251 datasheet(38/96 Pages) NSC

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50 Registers (Continued)

NOISE THRESHOLD REGISTER (NTR)

The Noise Threshold Register contains the start value for the Noise Counter This counter may be used in conjunction with the

Noise Prescale Counter for counting the Noise events Definiton of Noise event is explained in detail in Section 82 The Noise

Counter decrements once every 80 ns if the noise Prescale counter is zero and there is a noise event As a result the internal

noise counter takes

((NPTRa1) x (NTRa1))x80ns

to reach zero in the event of continuous Noise event

The threshold values for the Noise Counter and Noise Prescale Counter are simultaneously loaded into both counters if one of

the following conditions is true

(1) Both the Noise Counter and Noise Prescale Counter reach zero and the current Line State is either Noise Line State Active

Line State or Line State Unknown

(2) The current Line State is either Halt Line State Idle Line State Master Line State Quiet Line State or No Signal Detect

(3) The Noise Threshold Register or Noise Prescale Threshold Register goes through a Control Bus Interface write cycle

In addition the value of the Noise Prescale Threshold register is loaded into the Noise Prescale Counter if the Noise Prescale

Counter reaches zero

The Noise Counter and Noise Prescale Counter will continue to count without resetting or reloading the threshold values if a

Line State change occurs and the new line state is either Noise Line State Active Line State or Line State Unknown

When both the Noise Threshold Counter and Noise Counter both reach zero the Noise Threshold bit of the Receive Condition

ACCESS RULES

ADDRESS

READ

WRITE

0Dh

Always

NT7

NT6

NT5

NT4

NT3

NT2

NT1

NT0

Bit

Symbol

Description

NT0

NOISE THRESHOLD BITk0l

Least significant bit (LSB) of the start value

for the Noise Counter

D1–5

NT1–5

NOISE THRESHOLD BIT k1–5l

Intermediate bits of start value for the

Noise Counter

NT6

NOISE THRESHOLD BIT k6l

Most significant bit (MSB) of the start value

for the Noise Counter

RES

RESERVED

Reserved for future use

Note

Users are discouraged from using this bit Write data is ignored since the reserved

bit is permanently set to 0

DP83251 Datasheet(PDF) 38 Page - National Semiconductor (TI)

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