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ADP3191 Datasheet(PDF) 22 Page - Analog Devices

Part # ADP3191
Description  6-Bit, Programmable 2-/3-/4-Phase, Synchronous Buck Controller
PDF  28 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP3191 Datasheet(HTML) 22 Page - Analog Devices

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ADP3191
Rev. 0 | Page 22 of 28
TUNING THE ADP3191/ADP3191A
1.
Build a circuit based on the compensation values
computed from the design spreadsheet.
2.
Hook up the dc load to circuit, turn it on, and verify its
operation. Also, check for jitter at no load and full load.
DC Load Line Setting
3.
Measure the output voltage at no load (VNL). Verify it is
within tolerance.
4.
Measure the output voltage at full load cold (VFLCOLD). Let
the board sit for ~10 minutes at full load, and then measure
the output (VFLHOT). If there is a change of more than a few
millivolts, adjust RCS1 and RCS2, using Equation 35 and
Equation 36.
()
(
)
FLHOT
NL
FLCOLD
NL
OLD
CS2
NEW
CS2
V
V
V
V
R
R
−
−
×
=
(35)
5.
Repeat Step 4 until the cold and hot voltage measurements
remain the same.
6.
Measure the output voltage from no load to full load, using
5 A steps. Compute the load line slope for each change, and
then average to get the overall load line slope (ROMEAS).
7.
If ROMEAS is off from RO by more than 0.05 mΩ, use the
following to adjust the RPH values:
()
()
O
OMEAS
OLD
PH
NEW
PH
R
R
R
R
×
=
(36)
8.
Repeat Step 6 and Step 7 to check the load line, and repeat
adjustments if necessary.
9.
Once dc load line adjustment is complete, do not change
RPH, RCS1, RCS2, or RTH for the remainder of the procedure.
10. Measure the output ripple at no load and full load with a
scope, and make sure it is within specifications.
()
()
(
)
()
(
)
(
)
(
)
()
()
(
)
()
()
C
25
C
25
C
25
C
25
1
1
°
°
°
°
−
−
×
−
+
×
+
=
TH
TH
OLD
CS1
NEW
CS2
OLD
CS1
TH
OLD
CS1
TH
OLD
CS1
NEW
CS1
R
R
R
R
R
R
R
R
R
R
(37)



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