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TMPR4925 Datasheet(PDF) 350 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 350 Page - Toshiba Semiconductor |
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350 / 590 page ![]() Chapter 10 PCI Controller 10-88 10.4.60 Configuration Data 3 Register (PCICDATA3) 0xD1EC 31 24 23 16 ML MG R/W R/W : Type 0x00 0x00 : Initial value 15 8 7 0 IP HT R/W R/W : Type 0x00 0x00 : Initial value Bits Mnemonic Field Name Description 31:24 ML Maximum Latency Max_Lat (Maximum Latency) (Initial value: 0x00, R/W) This is the data loaded in the Max_Lat Register of the PCI Configuration Space. 23:16 MG Minimum Grant Min_Gnt (Minimum Grant) (Initial value: 0x00, R/W) This is the data loaded in the Min_Gnt Register of the PCI Configuration Space. 15:8 IP Interrupt Pin Interrupt Pin (Initial value: 0x00, R/W) This is the data loaded in the Interrupt Pin Register of the PCI Configuration Space. 7:0 HT Header Type Header Type (Initial value: 0x00, R/W) This is the data loaded in the Header Type Register of the PCI Configuration Space. Figure 10.4.60 Configuration Data 3 Register |
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