TMPR4925 datasheet(67/590 Pages) TOSHIBA

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Chapter 3 Signals

3-9

3.1.12

SPI Interface Signals

Table 3.1.12 SPI Interface Signals

Signal Name

Type

Description

Initial State

SPICLK

Output

SPI Clock

This pin is used for a data clock to or from an SPI slave device.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

SPIOUT

Output

SPI Data Output

This signal contains data to be shifted to an SPI slave device.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

SPIIN

Input

SPI Data Input

This signal contains data to be shifted from an SPI slave device.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

3.1.13

NAND Flash Memory Interface Signals

Table 3.1.13 NAND Flash Memory Interface Signals

Signal Name

Type

Description

Initial State

ND_ALE

Output

NAND Flash Address Latch Enable

ALE signal for NAND flash memory.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

ND_CLE

Output

NAND Flash Command Latch Enable

CLE signal for NAND flash memory.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

ND_CE*

Output

NAND Flash Chip Enable

CE signal for NAND flash memory.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

ND_RE*

Output

NAND Flash Read Enable

RE signal for NAND flash memory.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

ND_WE*

Output

NAND Flash Write Enable

WE signal for NAND flash memory.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

ND_R/B*

Input

NAND Flash Ready/Busy

Ready/Busy signal for NAND flash memory.

The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").

PIO input

3.1.14

Extended EJTAG Interface Signals

Table 3.1.14 Extended EJTAG Interface Signals (1/2)

Signal Name

Type

Description

Initial State

TCK

Input

JTAG Test Clock Input

Clock input signal for JTAG.

TCK is used to execute JTAG instructions and input/output data.

Input

TDI/DINT*

Input

JTAG Test Data Input/Debug Interrupt

When PC trace mode is not selected, this signal is a JTAG data input signal. It is used

to input serial data to JTAG data/instruction registers.

When PC trace mode is selected, this signal is an interrupt input signal used to cancel

PC trace mode for the debug unit.

Input

TDO/TPC[0]

Output

JTAG Test Data Output/PC Trace Output

When PC trace mode is not selected, this signal is a JTAG data output signal. Data is

output by means of serial scan.

When PC trace mode is selected, this signal outputs the value of the noncontiguous

program counter in sync with the debug clock (DCLK).

Input

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