THS7313 datasheet(24/48 Pages) TI

24 / 48 page

www.ti.com

OUTPUT MODES OF OPERATION – DC COUPLED

GND

CH.2 IN B

CH.3 IN B

I 2C-A0

SDA

VS+ 11

SCL

CH. 3 SAG

I 2C-A1

CH.1 IN B

CH.2 IN A

CH.3 IN A

CH.1 IN A

CH.3 OUT

CH. 2 SAG

CH.2 OUT

CH. 1 SAG

CH.1 OUT

DAC /

Encoder

(THS8200)

3.3 V

CVBS

Y’

C’

75 W

0.1 F

0.01 F

100 F

0.1 F

CVBS

Out

+Vs

I C

Controller

SDTV

CVBS

S-Video Y’

S-Video C’

480i

576i

G’B’R’

AC STC

AC Bias

DC + 135 mV

External

Input

CVBS

S-Video C’

S-Video Y’

75 W

C’

Out

Y’

Out

S-Video

THS7313

SLOS483 – NOVEMBER 2005

APPLICATION INFORMATION (continued)

The THS7313 incorporates a rail-to-rail output stage that can be used to drive the line directly without the need

for large ac-coupling capacitors. This is accomplished by connecting the output pin of each channel directly to

the SAG output pin of the corresponding channel as shown in Figure 52. This offers the best line tilt and field tilt

(or droop) performance since there is no ac coupling occurring. Keep in mind that if the input is ac coupled, then

the resulting tilt due to the input ac coupling is still seen on the output regardless of the output coupling. The

70-mA output current drive capability of the THS7313 is designed to drive two video lines simultaneously –

essentially a 75-

Ω load – while keeping the output dynamic range as wide as possible.

One concern of dc coupling is if the line is terminated to ground. When the ac-bias input mode is selected, the

output of the THS7313 is at mid-rail. With 2 lines terminated to ground, this creates a dc current path to exist

which results in a slightly decreased high output voltage swing resulting in an increase in power dissipation of the

THS7313. While the THS7313 is designed to operate with a junction temperature of up to 125

°C, care must be

taken to ensure that the junction temperature does not exceed this level or else long term reliability could suffer.

Although this configuration adds less then 10 mW of power dissipation per channel, the overall low power

dissipation of the THS7313 design minimizes potential thermal issues even when using the TSSOP package at

high ambient temperatures.

Figure 52. Typical SDTV CVBS/Y'/C' System With DC-Coupled Line Driving

Note that the THS7313 can drive the line with dc coupling regardless of the input mode of operation. The only

requirement is to make sure the video line has proper termination in series with the output pin – typically 75-

Ω.

This helps isolate capacitive loading effects from the THS7313 output. Failure to isolate capacitive loads may

result in instabilities with the output buffer potentially causing ringing or oscillations to appear. The stray

capacitance appearing directly at the THS7313 output pins should be kept below 25-pF for best performance.

When driving 2 video lines, each line should have its own 75-

Ω source termination resistors to isolate the lines

from each other.

THS7313 Datasheet(PDF) 24 Page - Texas Instruments

THS7313 Datasheet(HTML) 24 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL