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THS7313 Datasheet(PDF) 33 Page - Texas Instruments

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Part # THS7313
Description  3-Channel Low Power SDTV Video Amplifier with I2C Control, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes
PDF  48 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

THS7313 Datasheet(HTML) 33 Page - Texas Instruments

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A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
R = Read
A
A
A
P
DATA
DATA
S
Slave Address
From Transmitter
From Receiver
W
A6
A5
2
A0
A1
ACK
Acknowledge
(From Receiver)
I C Device Address and
Read/Write Bit
R/W
D7
D6
D0
D0
ACK
Stop
Condition
Acknowledge
(Receiver)
Last Data Byte
SDA
D7
D6
D1
D1
First Data
Byte
Start
Condition
Acknowledge
(Transmitter)
ACK
Other
Data Bytes
A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
R = Read
A
A
A
P
DATA
DATA
S
Slave Address
Transmitter
Receiver
R
A6
2
A0
ACK
Acknowledge
(From
Receiver)
I C Device Address and
Read/Write Bit
R/W
D7
D0
ACK
Stop
Condition
Acknowledge
(From
Transmitter)
Last Data Byte
SDA
D7
D6
D1
D0
ACK
First Data
Byte
Start
Condition
Not
Acknowledge
(Transmitter)
Other
Data Bytes
THS7313
SLOS483 – NOVEMBER 2005
APPLICATION INFORMATION (continued)
acknowledges data bytes sent by the slave. When the master has received all of the requested data bytes from
the slave, the not acknowledge (A) condition is initiated by the master by keeping the SDA signal high just before
it asserts the stop (P) condition. This sequence terminates a read cycle as shown in Figure 64 and Figure 65.
Note that the THS7313 does not allow multiple read transfers to occur. See example section – Reading from the
THS7313 for more information.
Figure 62. I2C Write Cycle
Figure 63. Multiple Byte Write Transfer
Figure 64. I2C Read Cycle
Figure 65. Multiple Byte Read Transfer
33



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