IMX7DCEC datasheet(6/161 Pages) NXP

6 / 161 page

i.MX 7Dual introduction

i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023

NXP Semiconductors

— One parallel 24-bit display port

— One EPD port

— One MIPI DSI port

• Camera sensors:

— One parallel Camera port (up to 24 bit and up to 133 MHz peak)

— One MIPI-CSI port

• Expansion cards:

— Three MMC/SD/SDIO card ports all supporting the following. Moreover, the third port can

support HS400.

– 1-bit or 4-bit transfer mode specifications for SD and SDIO cards, up to 208 MHz

– 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 200 MHz in both

SDR and DDR modes, including HS200 and HS400 DDR modes

• USB:

— Two high-speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB PHY

— One high-speed USB 2.0 (480 Mbps) host with integrated HSIC USB (high-speed inter-chip

USB) PHY

• Expansion PCI Express port (PCIe) v. 2.1 one lane

— PCI Express (Gen 2.0) dual mode complex, supporting root complex operations and endpoint

operations. Uses x1 PHY configuration.

• Miscellaneous IPs and interfaces:

— Three instances of SAI supporting up to three I2S and AC97 ports

— Seven UARTs, up to 4.0 Mbps:

– Providing RS232 interface

– Supporting 9-bit RS485 Multidrop mode

— Four eCSPI (Enhanced CSPI)

— Four I2C, supporting 400 kbps

— Two 1-gigabit Ethernet controllers (designed to be compatible with IEEE Std 1588),

10/100/1000 Mbps with AVB support

— Four pulse width modulators (PWM)

— System JTAG controller (SJC)

— GPIO with interrupt capabilities

— 8x8 key pad port (KPP)

— One quad SPI

— Four watchdog timers (WDOG)

— One (12 x 12 mm) or two (19 x 19 mm) 2-channel, 12-bit analog-to-digital converters

(ADC)—effective number of bits (ENOB) can vary (typically 9–10 bits) depending on the

system implementation and the condition of the power/ground noise condition

IMX7DCEC Datasheet(PDF) 6 Page - NXP Semiconductors