LTC7813 datasheet(39/59 Pages) AD

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Data Sheet

LT8210-1

analog.com

Rev. A

39 of 59

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Setting the switching frequency to fSW(OPTIMAL)has a host of benefits, including optimized loop stability, optimized line

rejection, and a flat average maximum inductor current across the duty cycle and switching region.

RT Set Switching Frequency

The switching frequency of the LT8210-1 is set with a resistor from the RT pin to the ground. Table 5 shows switching

frequency versus RT for 1% resistor values. The minimum and maximum switching frequencies are internally limited

should the RT resistor be shorted (typically fSW = 700kHz) or opened (typically fSW = 45kHz). It is strongly recommended

to use an RT resistor even when LT8210-1 is synchronized to an external clock using the SYNC/SPRD pin. If the

synchronization signal is lost, the LT8210-1 will revert to the RT set value within approximately 20μs.

Table 5. Switching Frequency vs. RT Value (1% Resistor)

RT (kΩ)

fSW (kHz)

RT (kΩ)

fSW (kHz)

16.2

411

41.2

190

16.9

397

13.2

184

17.8

379

45.2

177

18.7

364

47.5

171

20.0

343

49.9

165

21.0

329

52.3

160

22.1

315

54.9

155

23.2

300

59.0

147

24.3

289

64.9

138

25.5

277

71.5

130

26.7

267

78.7

122

28.0

257

86.6

115

29.4

247

95.3

109

30.9

237

100

105

32.4

229

110

100

34.0

220

121

35.7

212

133

37.4

205

150

39.2

200

174

Frequency Synchronization

The LT8210-1 switching frequency can be synchronized to an external clock using the SYNC/SPRD pin. The threshold

of the SYNC/SPRD receiver makes it compatible with standard 1.8V to 5.0V logic levels. Because an internal phase-

locked loop (PLL) is used, there is no restriction between the synchronization frequency and the RT set oscillator

frequency. The LT8210-1 is designed to transition seamlessly between the RT set switching frequency and the

external synchronization clock. If the SYNC/SPRD signal drops below 50kHz or stops altogether, the LT8210-1 will

revert to the RT set frequency within 20μs (typical). Setting the RT programmed frequency near the synchronization

frequency is recommended to maintain normal switching should the external clock signal be lost. When a

synchronization clock is first applied, the internal PLL may take 50μs or more to settle within 5% of the external clock

frequency. When the clock synchronization feature is not used, connect SYNC/SPRD to VDD to enable spread-

spectrum modulation; otherwise, connect to GND.

LTC7813 Datasheet(PDF) 39 Page - Analog Devices

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