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SAA7780 Datasheet(PDF) 45 Page - NXP Semiconductors |
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SAA7780 Datasheet(HTML) 45 Page - NXP Semiconductors |
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45 / 70 page ![]() ThunderBird Q3D PCI Audio SAA7780 Accelerator Philips Semiconductors Product Specification 1999 Sep 30 45 DMA Channel B Base Address Register - DMABBASE (RW) 5:4 DMAABASE RW DMA channel A programmable base address, bits 5:4. These bits select a channel number for this channel. In LAM DMAABASE[5:4] select the channel number that this DMA represents, it should be different than DMABBASE[5:4]. 3 R RO Reserved. This bit must always be zero. 2:1 XFRSIZ RW DMA transfer size. 00 = reserved 10 = double word 11 = reserved 01 = reserved 0 DDMAAEN RW DDMA channel A enable. This DDMA channel is enabled when this bit is set to a one. PCI CFG 0 D31 D30 D29 D28 D27 D26 D25 D24 Offset 42h DMABBASE[15:8] POR Value 0 0 0 0 0 0 0 0 D23 D22 D21 D20 D19 D18 D17 D16 DMAB BASE[7] R DMABBASE[5:4] R R R DDMAB EN POR Value 0 0 0 0 0 0 0 0 Bit Name R/W Function 15:7 DMABBASE RW DMA channel B programmable base address. Normally this base is set the same as DMA channel A except for DMABBASE[5:4] which selects the channel number. This is a requirement of some PC chipsets. Future chipsets may eliminate this requirement. In LAM DMABBASE[5:4] select the channel number that this DMA represents, it should be different than DMAABASE[5:4]. 6 R RO Reserved. This bit must always be zero. 5:4 DMABBASE RW DMA channel B programmable base address, bits 5:4. These bits select a channel number for this channel. In LAM DMABBASE[5:4] select the channel number that this DMA represents, it should be different than DMAABASE[5:4]. 3:1 R RO Reserved. These bits must always be zeros. 0 DDMABEN RW DMA channel B enable. This DDMA channel is enabled when this bit is set to a one. Bit Name R/W Function |
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