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SAA7780 Datasheet(PDF) 17 Page - NXP Semiconductors

Part # SAA7780
Description  ThunderBird Q3D PCI Audio Accelerator
PDF  70 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SAA7780 Datasheet(HTML) 17 Page - NXP Semiconductors

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ThunderBird Q3D PCI Audio
SAA7780
Accelerator
Philips Semiconductors
Product Specification
1999 Sep 30
17
TRDY#
69
IO-STS
PCI Bus Target Ready
When the SAA7780 is a PCI master, TRDY# is an input which
indicates the target agent’s ability to complete the data phase of the
transaction. After initiation of a PCI bus transaction, the SAA7780
inserts wait cycles until TRDY# is sampled active.
When the SAA7780 is a PCI slave, it drives TRDY# active to
indicate that the SAA7780 has sampled the data from AD[31:0]
during a write phase, or presented valid data on AD[31:0] during a
read phase.
PAR
75
IO-T
PCI Bus Parity
When the SAA7780 is a PCI master, it drives PAR to reflect the
correct value for even parity on the AD[31:0] and C/BE#[3:0] buses
one clock after the address phase and after each write data phases.
When the SAA7780 is a PCI slave, it drives PAR to reflect the
correct value for even parity on the AD[31:0] and C/BE#[3:0] buses
one clock after completion of each read data phase.
PCREQ#
36
O-TS
PC/PCI DMA Request
This signal requests DMA servies from en external chipset that
supports PC/PCI protocols. The SAA7780 chip asserts PCGNT#
according to the desired DMA channel required by either the
SoundBlaster or AC97 interfaces. The requested channel is
encoded serially on the PCGNT# pin.
The SAA7780 will become the bus owner when it receives an
asserted PCGNT# signal. This handshaking is synchronous to
PCLK.
PCGNT#
35
I-T
PC/PCI DMA Grant
An asserted PCGNT# pin indicates that the external PC/PCI master
arbiter has granted DMA services to the the encoded DMA channel
to the requesting DMA agent on the SAA7780 chip.
REQ#
38
O-TS
PCI Bus Request
This signal controls the PCI bus arbitration between the SAA7780
chip and the PCI master arbiter. When REQ# is asserted, the
SAA7780 indicates a desire to become the PCI bus owner. The
SAA7780 will become the bus owner when it receives an asserted
grant signals (GNT# is LOW). This handshaking is synchronous to
PCLK.
REQ# is three-stated while RST# is active.



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