SAA7780 datasheet(34/70 Pages) PHILIPS

34 / 70 page

ThunderBird Q3D PCI Audio

SAA7780

Accelerator

Philips Semiconductors

Product Specification

1999 Sep 30

Status Register - Status (RO/RW)

Offset 04h

FBACK_

ENB

SERR_R

ESP

POR Value

STEP-

PING

PERR_

RESP

SNOOP_

ENB

MEM_

INV_EN

SPEC_

CNTL

MAST_

CNTL

MEM_

CNTL

IO_

CNTL

POR Value

Bit

Name

R/W

Function

15:10

Reserved. These bits always return zero.

FBACK_ENB

Fast Back-to-Back Enable: the SAA7780, function 0 does not support fast

back to back master cycles therefore this bit always returns a zero.

SERR_RESP

System Error Response: When set to 1, the SAA7780, function 0 responds to

detected PCI bus address parity errors by asserting SERR#. When 0, the

SAA7780 ignores these errors.

STEPPING

Address / Data Stepping: Always returns 0.

PERR_RESP

Parity Error Response: When set to 1, the SAA7780, function 0 responds to

detected PCI bus data parity errors by asserting PERR#. When 0, the

SAA7780 ignores PCI bus data parity errors.

SNOOP_ENB

VGA Snoop Enable. The SAA7780, function 0 does not support VGA snoop

enable, therefore this bit always returns a zero.

MEM_INV_EN

Memory Write and Invalidate Enable: Always returns 0.

SPEC_CNTL

Special Cycle Control: Controls the devices ability to respond to Special

Cycle Operations. A value of 0 causes the SAA7780, function 0 to ignore all

Special Cycles.

MAST_CNTL

Master Control: Controls the devices ability to act as a master on the PCI bus.

A value of 0 disables the ability of the SAA7780, function 0, to act as a

primary PCI master. A value of 1 enables the SAA7780, function 0 to become

a PCI bus master.

MEM_CNTL

Memory Response Control: The SAA7780, function 0 does not support target

memory cycles therefore this bit always returns a zero.

IO_CNTL

I/O Response Control: Controls the SAA7780, function 0’s response to I/O

space. A value of 0 disables the device response. A value of 1 allows the

device to respond to I/O space accesses.

PCI CFG 0

D15

D14

D13

D12

D11

D10

Offset 06h

R_PERR

S_SERR

SM_

ABORT

RT_

ABORT

ST_

ABORT

DEVSEL_TMG

S_PERR

SAA7780 Datasheet(PDF) 34 Page - NXP Semiconductors

SAA7780 Datasheet(HTML) 34 Page - NXP Semiconductors

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