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H838024 Datasheet(PDF) 119 Page - Renesas Technology Corp |
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H838024 Datasheet(HTML) 119 Page - Renesas Technology Corp |
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119 / 697 page  Section 3 Exception Handling Rev. 7.00 Mar 10, 2005 page 77 of 652 REJ09B0042-0700 3.3 Interrupts 3.3.1 Overview The interrupt sources include 13 external interrupts (WKP7 to WKP0, IRQ4, IRQ3, IRQ1, IRQ0, IRQAEC) and 9 internal interrupts from on-chip peripheral modules. Table 3.2 shows the interrupt sources, their priorities, and their vector addresses. When more than one interrupt is requested, the interrupt with the highest priority is processed. The interrupts have the following features: • Internal and external interrupts can be masked by the I bit in CCR. When the I bit is set to 1, interrupt request flags can be set but the interrupts are not accepted. • IRQ 4, IRQ3, IRQ1, IRQ0, and WKP7 to WKP0 can be set to either rising edge sensing or falling edge sensing, and IRQAEC can be set to either rising edge sensing, falling edge sensing, or both edge sensing. |
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