PM7326 datasheet(39/238 Pages) PMC

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PM7326 S/UNI APEX

DATA SHEET

PMC-1981224

ISSUE 6

ATM/PACKET TRAFFIC MANAGER AND SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Pin Name

Type

No.

Function

LTADR[0]

LTADR[11]

Output

(Master)

Input

(Slave)

Y24

W23

AA26

Y25

W24

Y26

W25

V24

U23

W26

V25

U24

Loop Transmit Address. The LTADR[11:0] signals

are used to address up to 2048 logical channels for

the purposes of polling on the LTPA signal. 1 or

more PHY devices can share the LTPA signal

This pin is in Hi-Z when the loop transmit interface is

not enabled.

If transmit master mode is selected, these signals

are outputs. LTADR[11:0] selects a logical channel

for polling by applying the logical channel address N

LTCLK cycles prior to sampling LTPA. If the PHY

device is a UTOPIA device, N=1. If the PHY device

is an Any-PHY device, N=2. LTADR inserts NULL

cycles between addresses.

For Any-PHY transmit master, LTADR[11:0]

corresponds to the PORTID[11:0] fields in the Any-

PHY address word prepend format.

For UTOPIA L2 transmit master, LTADR[5:0] is also

used to select a UTOPIA device to transfer a cell to,

when LTENB is last sampled high. LTADR[11:6]

should be left unconnected.

For UTOPIA L1 transmit master, LTADR[11:0] is

unused and should be left unconnected.

If UTOPIA L2 receive slave mode is selected, these

signals are inputs. The S/UNI APEX drives LTPA

high 1 LTCLK after the LTADR[5:0] matches the

programmed LoopTxSlaveAddr register.

LTADR[11:6] are unused and should be tied either

high or low.

LTADR[11:0] is sampled/updated on the rising edge

of LTCLK.

PM7326 Datasheet(PDF) 39 Page - PMC-Sierra, Inc

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