PM7326 datasheet(60/238 Pages) PMC

60 / 238 page

PM7326 S/UNI APEX

DATA SHEET

PMC-1981224

ISSUE 6

ATM/PACKET TRAFFIC MANAGER AND SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Pin Name

Type

No.

Function

BUSPOL

Input

Bus Control Polarity. This signal indicates the

polarity of the WR and BLAST inputs to S/UNI

APEX.

When high, the BLAST pin is active high (high

indicates the last word of the burst) and the WR pin

is active low (low indicates write).

When low, the BLAST pin is active low (low

indicates the last word of the burst) and the WR pin

is active high (high indicates write).

BUSPOL is sampled on the rising edge of BCLK.

9.8 General (9 signals)

Pin Name

Type

No.

Function

RSTB

Input

AA4

Reset Bar. This signal provides an asynchronous

S/UNI APEX reset. RSTB is a Schmitt triggered

input with an internal pull-up resistor.

Input

AC1

Output Enable OE is an active high signal, which

allows all of the outputs of the device to operate in

their functional state. When this signal is low, all

outputs of the S/UNI APEX are Hi-Z’d, with the

exception of TDO.

OE has an internal pull up resistor.

SYSCLK

Input

B12

System Clock. This clock is the master clock for the

S/UNI APEX device. All non-Any-PHY or

microprocessor interface related internal

synchronous logic is timed to this signal. SYSCLK

must cycle at a 80 MHz or lower instantaneous rate.

External SSRAM and SDRAM devices share this

clock and must have clocks aligned within 0.2ns

skew of the clock seen by the S/UNI APEX device.

This clock must be stable prior to deasserting RSTB

0->1.

PM7326 Datasheet(PDF) 60 Page - PMC-Sierra, Inc

PM7326 Datasheet(HTML) 60 Page - PMC-Sierra, Inc

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