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PM7326 Datasheet(PDF) 13 Page - PMC-Sierra, Inc |
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PM7326 Datasheet(HTML) 13 Page - PMC-Sierra, Inc |
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13 / 238 page ![]() PM7326 S/UNI APEX DATA SHEET PMC-1981224 ISSUE 6 ATM/PACKET TRAFFIC MANAGER AND SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE xi LIST OF TABLES TABLE 1 - TERMINOLOGY ............................................................................ 1 TABLE 2 - SAMPLE FEATURE SET AS A FUNCTION OF MEMORY CAPACITY ..................................................................................... 15 TABLE 3 - PIN TYPE DEFINITION ............................................................... 17 TABLE 4 - NUMBER OF PORTS SUPPORTED, RECEIVE INTERFACE .... 50 TABLE 5 - NUMBER OF PORTS SUPPORTED, TRANSMIT INTERFACE.. 53 TABLE 6 - EXAMPLE WIRR TRANSMISSION SEQUENCE ........................ 56 TABLE 7 - AVAILABLE QUEUING PROCEDURES ...................................... 68 TABLE 8 - OAM & RRM CELL IDENTIFICATION ......................................... 73 TABLE 9 - CONGESTION ERROR FLAGS .................................................. 77 TABLE 10 - CONGESTION DISCARD RULES SELECTION ......................... 78 TABLE 11 - STATISTICAL COUNTS .............................................................. 82 TABLE 12 - IN/OUT BOUND CLP STATE FOR STATISTICAL COUNTS ....... 83 TABLE 13 - CONGESTION RULE & COUNT SUMMARY .............................. 83 TABLE 14 - RECEIVE INTERFACE THROUGHPUT, MCELLS/SEC ............. 94 TABLE 15 - QUEUE ENGINE THROUGHPUT, MCELLS/SEC....................... 95 TABLE 16 - TRANSMIT INTERFACE THROUGHPUT, MCELLS/SEC ........... 95 TABLE 17 - EXTERNAL QUEUE CONTEXT MEMORY MAP....................... 158 TABLE 18 - INTERNAL QUEUE CONTEXT MEMORY MAP........................ 158 TABLE 19 - INTERNAL WAN PORT SCHEDULER CONTEXT MEMORY MAP ..................................................................................................... 159 TABLE 20 - INTERNAL LOOP PORT SCHEDULER CONTEXT MEMORY MAP ..................................................................................................... 159 TABLE 21 - 2 BIT LOGARITHMIC, 2 BIT FRACTIONAL .............................. 160 |
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