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PM7326 Datasheet(PDF) 45 Page - PMC-Sierra, Inc |
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PM7326 Datasheet(HTML) 45 Page - PMC-Sierra, Inc |
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45 / 238 page ![]() PM7326 S/UNI APEX DATA SHEET PMC-1981224 ISSUE 6 ATM/PACKET TRAFFIC MANAGER AND SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 29 Pin Name Type Pin No. Function WRADR[0] .. WRADR[2] Output (Master) Input (Slave) R2 R3 T1 WAN Receive Address. The WRADR[2:0] signals are used to address up to four Physical layer devices for the purposes of polling and device selection. This pin is in Hi-Z when the WAN receive interface is not enabled. If UL2 or Any-PHY receive master mode is selected, this bus is an output. WRADR[2:0] selects a device for polling by applying the device address N WRCLK cycles prior to sampling WRPA. If the PHY device selected is a UTOPIA device, N=1. If the PHY device selected is an Any-PHY device, N=2. When supporting multiple PHYs, WRADR will insert 1 NULL address between address changes. If UL1 master mode is selected, this bus is driven to a high NULL address. WRADR[2:0] selects a device to transfer a data block when the WRENB is last sampled high. The start of data block transfer must occur 1 or 2 WRCLK cycles after device selection occurs. WRADR[2:0] = 7 hex is used as the NULL address. No PHY device can match the NULL address. If slave mode is selected, this signal is an input and the S/UNI APEX plays the roll of a single port UTOPIA L2 slave device driving the WRPA 1 WRCLK after the WRADR[1:0] matches the programmed WANRxSlaveAddr register, and WRADR[2] is zero. WRADR[2:0] is sampled/updated on the rising edge of WRCLK. WRSX Input V1 WAN Receive Start of Transfer. WRSX is asserted by the selected PHY device during the first cycle of a data block transfer coinciding with the port address prepend. WRSX is ignored during cell transfers from UTOPIA or SCI-PHY devices. WRSX is updated on the rising edge of WRCLK. |
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