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AM69 Datasheet(PDF) 126 Page - Texas Instruments |
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AM69 Datasheet(HTML) 126 Page - Texas Instruments |
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126 / 312 page  Table 5-105. GPMC0 Signal Descriptions (continued) SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALY PIN [4] AND PIN [4] GPMC0_AD3 IO GPMC Data 3 Input/Output in A/D non- multiplexed mode and additionally Address 4 Output in A/D multiplexed mode AG37 H32 GPMC0_AD4 IO GPMC Data 4 Input/Output in A/D non- multiplexed mode and additionally Address 5 Output in A/D multiplexed mode AK37 E33 GPMC0_AD5 IO GPMC Data 5 Input/Output in A/D non- multiplexed mode and additionally Address 6 Output in A/D multiplexed mode AD36 L31 GPMC0_AD6 IO GPMC Data 6 Input/Output in A/D non- multiplexed mode and additionally Address 7 Output in A/D multiplexed mode AJ32 J33 GPMC0_AD7 IO GPMC Data 7 Input/Output in A/D non- multiplexed mode and additionally Address 8 Output in A/D multiplexed mode AJ37 G33 GPMC0_AD8 IO GPMC Data 8 Input/Output in A/D non- multiplexed mode and additionally Address 9 Output in A/D multiplexed mode AC32 G31 GPMC0_AD9 IO GPMC Data 9 Input/Output in A/D non- multiplexed mode and additionally Address 10 Output in A/D multiplexed mode AC37 J31 GPMC0_AD10 IO GPMC Data 10 Input/Output in A/D non- multiplexed mode and additionally Address 11 Output in A/D multiplexed mode AD37 P33 GPMC0_AD11 IO GPMC Data 11 Input/Output in A/D non- multiplexed mode and additionally Address 12 Output in A/D multiplexed mode AE37 G32 GPMC0_AD12 IO GPMC Data 12 Input/Output in A/D non- multiplexed mode and additionally Address 13 Output in A/D multiplexed mode AC36 K32 GPMC0_AD13 IO GPMC Data 13 Input/Output in A/D non- multiplexed mode and additionally Address 14 Output in A/D multiplexed mode AE36 R32 GPMC0_AD14 IO GPMC Data 14 Input/Output in A/D non- multiplexed mode and additionally Address 15 Output in A/D multiplexed mode AF38 N33 GPMC0_AD15 IO GPMC Data 15 Input/Output in A/D non- multiplexed mode and additionally Address 16 Output in A/D multiplexed mode AE38 G29 GPMC0_BE0n_CLE O GPMC Lower-Byte Enable (active low) or Command Latch Enable AH38 H31 GPMC0_BE1n O GPMC Upper-Byte Enable (active low) AJ38 F31 GPMC0_CSn0 O GPMC Chip Select 0 (active low) AG38 H30 GPMC0_CSn1 O GPMC Chip Select 1 (active low) AH37 F33 GPMC0_CSn2 O GPMC Chip Select 2 (active low) AE35, AL32 M31, P32 GPMC0_CSn3 O GPMC Chip Select 3 (active low) AJ33 T29 GPMC0_WAIT0 I GPMC External Indication of Wait AC33 G28 GPMC0_WAIT1 I GPMC External Indication of Wait AE33 U30 GPMC0_WAIT2 I GPMC External Indication of Wait AF33 T31 GPMC0_WAIT3 I GPMC External Indication of Wait AD38 H29 AM69A, AM69 SPRSP92C – FEBRUARY 2023 – REVISED JUNE 2024 www.ti.com 126 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: AM69A AM69 |
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