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3.3V operation is acceptable, then domain can be grouped with digital IO 3.3V power rail. If a SD card is

capable of operating with fixed 1.8V, then domain can be grouped with digital IO 1.8V power rail.

4. VDDA_3P3_USB is 3.3V analog domain used for USB 2.0 differential interface signaling. A low noise,

analog supply is recommended to provide best signal integrity for USB data eye mask compliance. If USB

interface is not needed or data bit errors can be tolerated, then domain can be grouped with 3.3V digital IO

power rail either directly or through a supply filter.

5. VDDA_1P8_<phy> are 1.8V analog domains supporting multiple serial PHY interfaces. A low noise, analog

supply is recommended to provide best signal integrity, interface performance and spec compliance. If any of

these interfaces are not needed, data bit errors or non-compliant operation can be tolerated, then domains

can be grouped with digital IO 1.8V power rail either directly or through an in-line supply filter is allowed.

6. VDD_MMC0 is 1.8V digital supply supporting MMC0 signaling for eMMC interface. If MMC0 or eMMC0

interface is not needed, then domain can be grouped with digital IO 1.8V power rail. However, if MMC0

interface is needed, then VDD_MMC0 must not start ramp-up until VDD_CORE has reached Vopr min.

7. VDD_MCU is a digital voltage supply with a wide operational voltage range and power sequencing flexibility,

enabling it to be grouped and ramped-up with either 0.8V VDD_CORE or 0.85V RAM array domains

(VDDAR_xxx).

8. VDDA_1P8_<clk/pll/ana> are 1.8V analog domains supporting clock oscillator, PLL and analog circuitry

needing a low noise supply for optimal performance.

Table 8-2. Isolated MCU and Main Voltage Domain Power Rail Mapping

TYPES

VOLTAGE [V]

DOMAIN NAMES

DOMAIN

GROUPS

POWER RAILS

Digital IO

3.3

(VDDSHV0_MCU,

VDDSHV1_MCU,

VDDSHV2_MCU)1

VDDSHVn_MC

VDD_MCUIO_3V3

Digital IO

3.3

(VDDSHV0, VDDSHV1,

VDDSHV2, VDDSHV3,

VDDSHV4, VDDSHV53,

VDDSHV6)1, VDDA_3P3_USB4

VDDSHVn,

VDDA_3P3_US

VDD_IO_3V3

Digital IO

1.8

(VDDSHV0_MCU,

VDDSHV1_MCU,

VDDSHV2_MCU)2

VDDSHVn_MC

VDD_MCUIO_1V8

Digital IO

1.8

(VDDSHV0, VDDSHV1,

VDDSHV2, VDDSHV3,

VDDSHV4, VDDSHV53,

VDDSHV6)2

VDDSHVn2 3

VDD_IO_1V8

Digital IO

1.8

VDDS_MMC06

VDDS_MMC0_1V86

Analog Clk,

Meas

1.8

VDDA_MCU_PLLGRP0,

VDDA_MCU_TEMP,

VDDA_ADC_MCU,

VDDA_POR_WKUP,

VDDA_WKUP

VDDA_MCU1P

8_<clk/meas>

VDA_MCU_1V8

Analog Clk,

Meas

1.8

VDDS_OSC1,

VDDA_PLLGRP6:0,

VDDA_TEMP3:0

VDDA_1P8_<cl

k/meas>

VDA_DPLL_1V8

Analog PHY

1.8

(VDDA_1P8_CSIRX,

VDDA_1P8_USB,

VDDA_1P8_UFS,

VDDA_1P8_DP,

VDDA_1P8_DSITX,

VDDA_1P8_MLB,

VDDA_1P8_SERDES)5

VDDA_1P8_<p

hy>5

VDA_PHY_1V85

Analog, low

voltage

0.80

VDDA_0P8_PLL_MLB,

VDDA_0P8_PLL_DDR,

VDDA_0P8_DLL_MMC0

VDDA_0P8_DP

VDA_DPLL_0V8

Digital, low

voltage

0.80

VDD_MCU, VDDAR_MCU

VDD_MCU,

VDDAR_MCU

VDD_MCU_0V85

Digital, AVS low

voltage

0.77 – 0.84

vdd_cpu

VDD_CPU

VDD_CPU_AVS

TDA4VM-Q1, TDA4VM

SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024

www.ti.com

308

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