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SYSCLKOUT0

OBSCLK0

CLKOUT0

CLK4

CLK5

CLK6

CLK7

CLK8

CLK9

CLK10

CLK11

CLK12

MCU_SYSCLKOUT0

CLK13

CLK14

CLK15

MCU_OBSCLK0

CLK16

CLK17

CLK18

Figure 6-21. Clock Switching Characteristics

6.9.4 Clock Specifications

6.9.4.1 Input and Output Clocks / Oscillators

Various external clock inputs/outputs are needed to drive the device. Summary of these input clock signals is as

follows:

• OSC1_XO/OSC1_XI — Еxternal main crystal interface pins connected to internal oscillator which sources

reference clock and provides reference clock to PLLs within MAIN domain. Also, for audio applications,

high-frequency oscillator 0 is used to provide audio clock frequencies to MCASPs.

• High frequency oscillators inputs

– OSC1_XO/OSC1_XI — external main crystal interface pins connected to internal oscillator which sources

reference clock. Provides reference clock to PLLs within MCU domain and MAIN domain. This high-

frequency oscillator is used to provide audio clock frequencies to MCASPs.

– WKUP_OSC0_XO/WKUP_OSC0_XI — external main crystal interface pins connected to internal

oscillator which sources reference clock. Provides reference clock to PLLs within WKUP and MAIN

domain.

• Low frequency oscillator input

– WKUP_LFOSC_XO/WKUP_LFOSC_XI — external main crystal interface pins connected to internal

oscillator which sources reference clock provides a clock for low power operation in deeper sleep modes.

• General purpose clock inputs

– MCU_EXT_REFCLK0 — optional external. Provides system clock input (MCU domain).

– EXT_REFCLK1 — optional external System clock input (MAIN domain). Optionally PLL2 (PER1) and

MCASP can be sourced by EXT_REFCLK1 (sourced externally).

– SERDES4_REFCLK_P/N — SerDes reference clock input for PCIe or Optional USB3 and SGMII

interfaces.

– PCIE_REFCLK[3:0]N/P — There are 4 differential clock input/output pins to support PCIe devices.

• External video pixel clock inputs

– VOUT0_EXTPCLKIN — optional for the DPI0 port of DSS.

– VOUT1_EXTPCLKIN — optional for the DPI1 port of DSS.

• External CPTS reference clock inputs

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TDA4VM-Q1, TDA4VM

SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024

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