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TDA4VM21 Datasheet(PDF) 218 Page - Texas Instruments |
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TDA4VM21 Datasheet(HTML) 218 Page - Texas Instruments |
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218 / 331 page ![]() 6.9.5.4.2.3 RMII[x]_TXD[1:0], and RMII[x]_TXEN Switching Characteristics – RMII Mode NO. PARAMETER MIN TYP MAX UNIT RMII6 td(ref_clkH-txdV) Delay time, RMII[x]_REF_CLK rising edge to RMII[x]_TXD[1:0] valid 2 13 ns td(ref_clkH-tx_enV) Delay time, RMII[x]_REF_CLK rising edge to RMII[x]_TX_EN valid 2 13 ns RMII[x]_TXD[1:0], RMII[x]_TX_EN RMII6 RMII[x]_REF_CLK Figure 6-50. RMII[x]_TXD[1:0], and RMII[x]_TX_EN Switching Characteristics – RMII Mode 6.9.5.4.3 CPSW9G RGMII Timings Table 6-48, Section 6.9.5.4.3.1, Section 6.9.5.4.3.2, and Figure 6-51 present timing requirements for receive RGMII operation. For more information, see Gigabit Ethernet Switch (CPSW0) section in Peripherals chapter in the device TRM. Table 6-48. CPSW9G RGMII Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 2.64 5 V/ns OUTPUT CONDITIONS CL Output load capacitance 2 20 pF PCB CONNECTIVITY REQUIREMENTS td(Trace Mismatch Delay) Propagation delay mismatch across all traces RGMII[x]_RXC, RGMII[x]_RD[3:0], RGMII[x]_RX_CTL 50 ps RGMII[x]_TXC, RGMII[x]_TD[3:0], RGMII[x]_TX_CTL 50 ps 6.9.5.4.3.1 RGMII[x]_RXC Timing Requirements – RGMII Mode NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT RGMII1 tc(rxc) Cycle time, RGMII[x]_RXC 10Mbps 360 440 ns 100Mbps 36 44 ns 1000Mbps 7.2 8.8 ns RGMII2 tw(rxcH) Pulse duration, RGMII[x]_RXC high 10Mbps 160 240 ns 100Mbps 16 24 ns 1000Mbps 3.6 4.4 ns RGMII3 tw(rxcL) Pulse duration, RGMII[x]_RXC low 10Mbps 160 240 ns 100Mbps 16 24 ns 1000Mbps 3.6 4.4 ns TDA4VM-Q1, TDA4VM SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024 www.ti.com 218 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TDA4VM-Q1 TDA4VM |
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