Use the following procedure for setting a starting sub-address for I2C reads:

1. The controller initiates a write operation by generating a start condition (S), followed by the TDP142-Q1 7-bit

address and a zero-value “W/R” bit to indicate a write cycle.

2. The TDP142-Q1 acknowledges the address cycle.

3. The controller presents the sub-address (I2C register within TDP142-Q1) to be written, consisting of one byte

of data, MSB-first.

4. The TDP142-Q1 acknowledges the sub-address cycle.

5. The controller terminates the write operation by generating a stop condition (P).

Note

If no sub-addressing is included for the read procedure, and reads start at register offset 00h and

continue byte by byte through the registers until the I2C controller terminates the read operation. If a

I2C address write occurred prior to the read, then the reads start at the sub-address specified by the

address write.

Table 6-5. Register Legend

ACCESS TAG

NAME

MEANING

R

Read

The field can be read by software

W

Write

The field can be written by software

S

Set

The field can be set by a write of one. Writes of zeros to the field have no effect.

C

Clear

The field can be cleared by a write of one. Write of zero to the field have no effect.

U

Update

Hardware may autonomously update this field.

NA

No Access

Not accessible or not applicable

www.ti.com

TDP142-Q1

SLLSG10 – NOVEMBER 2024

Copyright © 2024 Texas Instruments Incorporated

Submit Document Feedback

17

Product Folder Links: TDP142-Q1