AKD4635 datasheet(52/81 Pages) AKM

52 / 81 page

[AK4635]

Rev. 0.6

2007/10

- 52 -

■ MONO LINE OUTPUT (AOUT pin)

A signal of DAC is output from the AOUT pin. When the DACA bit is “0”, this output is OFF. When the LOVL bit is “1”,

this gain changes to +2dB. The load resistance is 10k

Ω(min). When PMAO bit is “0” and AOPSN bit is “0”, the mono

line output enters power-down and is pulled down by 100

Ω(typ). If PMAO bit is controlled at AOPS bit = “1”, POP noise

will be reduced at power-up and down. Then, this line should be pulled down by 20k

Ω of resister after C-coupling shown

in Figure 45. This rising and falling time is max 300 ms at C = 1.0

μF . When PMAO bit is “1” and AOPS bit is “0”, the

mono line output enters power-up state.

LOVL bits

Gain

0dB

(default)

+2dB

Table 36. Mono line output volume setting

AOUT

μF

220

20k

Figure 45. AOUT external circuit when using POP Reduction function

AOUT Control Sequence in case of using POP Reduction Circuit

P M A O b it

A OP S b it

A O U T pin

(1 )

(2 )

No r m a l O u tp u t

(3 )

( 4 )

(5 )

(6 )

≥ 300 m s

≥ 3 00 m s

Figure 46. Mono Line Output Control Sequence when using POP Reduction function

(1) Set AOPS bit = “1”. Mono line output enters the power-save mode.

(2) Set PMAO bit = “1”. Mono line output exits the power-down mode.

AOUT pin rises up to VCOM voltage. Rise time is 200ms (max 300ms) at C=1

μF.

(3) Set AOPS bit = “0” after AOUT pin rises up. Mono line output exits the power-save mode.

Mono line output is enabled.

(4) Set AOPS bit = “1”. Mono line output enters power-save mode.

(5) Set PMAO bit = “1”. Mono line output enters power-down mode.

AOUT pin falls down to VSS1. Fall time is 200ms (max 300ms) at C=1

μF.

(6) Set AOPS bit = “0” after AOUT pin falls down. Mono line output exits the power-save mode.

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