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AKD4635 Datasheet(PDF) 15 Page - Asahi Kasei Microsystems |
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AKD4635 Datasheet(HTML) 15 Page - Asahi Kasei Microsystems |
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15 / 81 page ![]() [AK4635] Rev. 0.6 2007/10 - 15 - Parameter Symbol min typ max Units EXT Master Mode (Figure 6) MCKI Frequency: 256fs 512fs 1024fs Pulse Width Low Pulse Width High fCLK fCLK fCLK tCLKL tCLKH 1.8816 3.7632 7.5264 0.4/fCLK 0.4/fCLK 2.048 4.096 8.192 - - 12.288 13.312 13.312 - - MHz MHz MHz ns ns FCK Frequency (MCKI = 256fs) (MCKI = 512fs) (MCKI = 1024fs) Duty Cycle fFCK fFCK fFCK dFCK 7.35 7.35 7.35 - 8 8 8 50 48 26 13 - kHz kHz kHz % BICK: Period (BCKO1-0 bit = “00”) (BCKO1-0 bit = “01”) (BCKO1-0 bit = “10”) Duty Cycle tBCK tBCK tBCK dBCK - - - - 1/16fFCK 1/32fFCK 1/64fFCK 50 - - - - ns ns ns % Audio Interface Timing DSP Mode: (Figure 7, Figure 8) FCK “ ↑” to BICK “↑” (Note 29) FCK “ ↑” to BICK “↓” (Note 30) BICK “ ↑” to SDTO (BCKP bit = “0”) BICK “ ↓” to SDTO (BCKP bit = “1”) SDTI Hold Time SDTI Setup Time tDBF tDBF tBSD tBSD tSDH tSDS 0.5 x tBCK −40 0.5 x tBCK −40 −70 −70 50 50 0.5 x tBCK 0.5 x tBCK - - - - 0.5 x tBCK + 40 0.5 x tBCK +40 70 70 - - ns ns ns ns ns ns Except DSP Mode: (Figure 9) BICK “ ↓” to FCK Edge FCK to SDTO (MSB) (Except I2S mode) BICK “ ↓” to SDTO SDTI Hold Time SDTI Setup Time tBFCK tFSD tBSD tSDH tSDS −40 −70 −70 50 50 - - - - - 40 70 70 - - ns ns ns ns ns Note 28. Duty Cycle = (the width of “L”)/(the period of clock)*100 Note 29. MSBS, BCKP bits = “00” or “11” Note 30. MSBS, BCKP bits = “01” or “10” Note 31. BICK rising edge must not occur at the same time as FCK edge. |
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