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AKD4635 Datasheet(PDF) 16 Page - Asahi Kasei Microsystems

Part # AKD4635
Description  16-Bit Mono CODEC with ALC & MIC/SPK/Video-AMP
PDF  81 Pages
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Manufacturer  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AKD4635 Datasheet(HTML) 16 Page - Asahi Kasei Microsystems

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[AK4635]
Rev. 0.6
2007/10
- 16 -
Parameter
Symbol
min
typ
max
Units
Control Interface Timing (3-wire Serial mode)
CCLK Period
tCCK
200
-
-
ns
CCLK Pulse Width Low
tCCKL
80
-
-
ns
Pulse Width High
tCCKH
80
-
-
ns
CDTI Setup Time
tCDS
40
-
-
ns
CDTI Hold Time
tCDH
40
-
-
ns
CSN “H” Time
tCSW
150
-
-
ns
CSN “
↓” to CCLK “↑”
tCSS
50
-
-
ns
CCLK “
↑” to CSN “↑”
tCSH
50
-
-
ns
CCLK “
↓” to CDTI (at Read Command)
tDCD
-
-
70
ns
CSN “
↑” to CDTI (Hi-Z) (at Read Command)
tCCZ
-
-
70
ns
Control Interface Timing (I2C Bus mode):
SCL Clock Frequency
fSCL
-
-
400
kHz
Bus Free Time Between Transmissions
tBUF
1.3
-
-
μs
Start Condition Hold Time (prior to first clock pulse)
tHD:STA
0.6
-
-
μs
Clock Low Time
tLOW
1.3
-
-
μs
Clock High Time
tHIGH
0.6
-
-
μs
Setup Time for Repeated Start Condition
tSU:STA
0.6
-
-
μs
SDA Hold Time from SCL Falling (Note 33)
tHD:DAT
0
-
-
μs
SDA Setup Time from SCL Rising
tSU:DAT
0.1
-
-
μs
Rise Time of Both SDA and SCL Lines
tR
-
-
0.3
μs
Fall Time of Both SDA and SCL Lines
tF
-
-
0.3
μs
Setup Time for Stop Condition
tSU:STO
0.6
-
-
μs
Capacitive Load on Bus
Cb
-
-
400
pF
Pulse Width of Spike Noise Suppressed by Input Filter
tSP
0
-
50
ns
Reset Timing
PDN Pulse Width
(Note 32, Note 33, Note 34)
tPD
150
-
-
ns
PMADC “
↑” to SDTO valid
(Note 35)
ADRST bit = “0”
tPDV
-
1059
-
1/fs
ADRST bit = “1”
tPDV
-
291
-
1/fs
Note 32. I2C is a registered trademark of Philips Semiconductors.
Note 33. RL = 1kΩ/10% change ( Pull-up to DVDD)
Note 34. The AK4635 can be reset by the PDN pin = “L”
Note 35. This is the count of FCK “
↑” from the PMADC = “1”.



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