FXLS8971CF datasheet(17/100 Pages) NXP

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NXP Semiconductors

FXLS8971CF

3-Axis Low-g Accelerometer

a read by not acknowledging a byte at the appropriate time in the protocol, followed by the SP signal. A primary

may also issue a repeated start signal (SR) during a transfer.

12.1.2 I2C read/write operations

12.1.2.1 Single-byte read

The primary transmits a start condition (ST) to FXLS8971CF, followed by the secondary address, with the R/

W bit set to '0' for a write, and the FXLS8971CF sends an acknowledgment. Then the primary transmits the

address of the register to read and the FXLS8971CF sends an acknowledgment. The primary transmits a

repeated start condition (SR), followed by the secondary address with the R/W bit set to '1' for a read from the

previously selected register. The FXLS8971CF then acknowledges and transmits the data from the requested

end the data transfer.

12.1.2.2 Multiple-byte read

When performing a multi-byte or burst read, FXLS8971CF automatically increments the register read address

pointer after a read command is received. Therefore, after following the steps of a single-byte read, multiple

bytes of data can be read from sequential register addresses after each FXLS8971CF acknowledgment (ACK)

is received. Data can be read until the primary issues a no acknowledge (NAK), followed by a stop condition

(SP) signaling the end of the transfer.

12.1.2.3 Single-byte write

To start a write command, the primary transmits a start condition (ST) to the FXLS8971CF, followed by the

secondary address with the R/W bit set to '0' for a write, and the FXLS8971CF sends an acknowledgment. Then

the primary transmits the address of the register to write to, and the FXLS8971CF sends an acknowledgment.

Then the primary transmits the 8-bit data to write to the designated register and the FXLS8971CF sends an

acknowledgment signaling it has received the data. Since this transmission is complete, the primary transmits a

stop condition (SP) to end the data transfer. The data sent to the FXLS8971CF is now stored in the appropriate

12.1.2.4 Multiple-byte write

FXLS8971CF automatically increments the register address write pointer after a write command is received.

Therefore, after following the steps of a single-byte write, multiple bytes of data can be written to sequential

registers after each acknowledgment (ACK) is received.

FXLS8971CF

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Product data sheet

Rev. 2.1 — 7 March 2024

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FXLS8971CF Datasheet(PDF) 17 Page - NXP Semiconductors