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FXLS8971CF Datasheet(PDF) 29 Page - NXP Semiconductors

Part # FXLS8971CF
Description  3-Axis Low-g Accelerometer
PDF  100 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS8971CF Datasheet(HTML) 29 Page - NXP Semiconductors

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NXP Semiconductors
FXLS8971CF
3-Axis Low-g Accelerometer
2
1
Operating mode
VDD min
VDD pin level
3
4
5
6
7
BOOT
TBOOT1
TBOOT1
Edge triggered wakeup on SPI_CS_B/WAKE_UP line
aaa-040848
TPULSE - BOOT1
INT/MOT_DET
BOOT
OFF
STANDBY
Hibernate
STANDBY
SENS_CONFIG1
[ACTIVE] = 1
SENS_CONFIG5
[HIBERNATE_EN] = 1
SPI serial
command
SPI_CS_B
/WAKE_UP
ACTIVE (WAKE)
TPULSE - BOOT1
Figure 19. BOOT1 sequence (BT_MODE = GND)
Protocol
phase
Description
1
VDD supply is not present (VDD < VDDmin); MCU and FXLS8971CF are both off; all IO pins are floating/high-z.
2
VDD ≥ VDDmin; MCU and FXLS8971CF are turned on; FXLS8971CF performs the BOOT sequence and
provides the BOOT_OUT output pulse for TPULSE-BOOT1 ms.
3
FXLS8971CF enters standby mode directly after the BOOT sequence.
4
When the MCU sends a serial command to set
SENS_CONFIG5[HIBERNATE_EN] bit to 1, FXLS8971CF
enters Hibernate mode. NOTE: The device enters into Hibernate mode 1us (typ) after the SPI_CS_B line is
de-asserted for the corresponding HIBERNATE_EN serial command.
5
To wake up the device from Hibernate mode, the MCU toggles the SPI_CS_B/WAKE UP pin (see TFLT-WAKE_
UP deglitch filter time for transition out of Hibernate mode); FXLS8971CF performs the BOOT sequence and
provides the BOOT_OUT output pulse for TPULSE-BOOT1 ms.
6
FXLS8971CF enters standby mode directly after the BOOT sequence.
7
When the MCU sends a serial command to set
SENS_ CONFIG1[ACTIVE] bit to 1, FXLS8971CF enters
active mode.
Table 19. BOOT1 sequence description (BT_MODE = GND)
FXLS8971CF
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 2.1 — 7 March 2024
29 / 100



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