FXLS8971CF datasheet(72/100 Pages) NXP

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NXP Semiconductors

FXLS8971CF

3-Axis Low-g Accelerometer

Field

Description

Y_OT_EN

SDCD function Y-axis outside-of-thresholds condition

0: Y-axis data or delta is not used in the outside of thresholds condition evaluation.

1: Y-axis data or delta is used in the outside of thresholds condition evaluation.

Z_OT_EN

SDCD function Z-axis outside-of-thresholds condition

0: Z-axis data or delta is not used in the outside of thresholds condition evaluation.

1: Z-axis data or delta is used in the outside of thresholds condition evaluation.

X_WT_EN

SDCD function X-axis within-thresholds condition

0: X-axis data or delta is not used in the within thresholds condition evaluation.

1: X-axis data or delta is used in the within thresholds condition evaluation.

Y_WT_EN

SDCD function Y-axis within-thresholds condition

0: Y-axis data or delta is not used in the within thresholds condition evaluation.

1: Y-axis data or delta is used in the within thresholds condition evaluation.

Z_WT_EN

SDCD function Z-axis within-thresholds condition

0: Z-axis data or delta is not used in the within thresholds condition evaluation.

1: Z-axis data or delta is used in the within thresholds condition evaluation.

Table 101. SDCD_CONFIG1 register (address 2Fh) bit description...continued

15.5.4 SDCD_CONFIG2 register (address 30h)

Bit

Name

SDCD_EN

REF_UPDM[1:0]

OT_

DBCTM

WT_

DBCTM

WT_

LOG_SEL

MODE

REF_UPD

Reset (BT_MODE = GND)

Reset (BT_MODE = VDD)

Access

R/W

Table 102. SDCD_CONFIG2 register (address 30h) bit allocation

Field

Description

SDCD_EN

SDCD function

0 (default after a POR or soft reset event when BT_MODE = GND): SDCD function is disabled. All

clocks and power for the function are turned off.

1 (default after a POR or soft reset event when BT_MODE = VDD and MOT_DET = 1): SDCD function

is enabled. When this bit is set, the 12-bit reference values (

REF_X/Y/Z) are initialized per the

settings made in REF_UPDM[1:0].

6 to 5

REF_UPDM

SDCD internal reference values update mode

00b: The function stores the first 12-bit X/Y/Z decimated and trimmed input data (OUT_X/Y/Z[n=0]) as

the internal REF_X/Y/Z values after the function is enabled (SDCD_EN is set to 1). The REF_X/Y/Z

values are updated with the current 12-bit X/Y/Z decimated input data (OUT_X/Y/Z[n]) whenever the

SDCD_OT_EA flag is true.

01b: The function stores the first decimated and trimmed X/Y/Z acceleration input data (OUT_X/Y/

Z[n=0]) as the internal REF_X/Y/Z values when the SDCD function is enabled; the REF_X/Y/Z values

are then held constant and never updated until the SDCD function is disabled and subsequently

reenabled, or asynchronously when the host sets the REF_UPD bit.

Table 103. SDCD_CONFIG2 register (address 30h) bit description

FXLS8971CF

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Product data sheet

Rev. 2.1 — 7 March 2024

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