| Electronic Components Datasheet Search |
|
ADS8513 Datasheet(PDF) 6 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
ADS8513 Datasheet(HTML) 6 Page - Texas Instruments |
|
6 / 24 page ![]() www.ti.com TYPICAL CHARACTERISTICS BASIC OPERATION INTERNAL DATACLK 1 2 3 4 5 6 7 8 R1 IN GND R2 IN R3 IN BUF CAP REF GND V S PWRD BUSY CS CONV EXT/INT DATA DATACLK 16 15 14 13 12 11 10 9 ADS8513(SO) ±10V +5V C 3 1µF C 4 0.01µF C 1 0.1µF C 2 10µF C 5 1µF + + ConvertPulse 40nsmin + FrameSync(optional) EXTERNAL DATACLK 1 2 3 4 5 6 7 8 R1 IN GND R2 IN R3 IN BUF CAP REF GND V S PWRD BUSY CS CONV EXT/INT DATA DATACLK 16 15 14 13 12 11 10 9 ADS8513(SO) ±10V NOTE:(1) TieCStoGNDiftheoutputswillalwaysbeactive. +5V +5V C 1 0.1µF C 2 10µF C 5 1µF + ConvertPulse 40nsmin + Interrupt(optional) ExternalClock ChipSelect(optional(1)) C 3 1µF C 4 0.01µF + ADS8513 SLAS486 – JUNE 2007 Figure 1 shows a basic circuit to operate the ADS8513 with a ±10-V input range. To begin a conversion and serial transmission of the results from the previous conversion, a falling edge must be provided to the CONV input. BUSY will go LOW indicating that a conversion has started and will stay LOW until the conversion is complete. During the conversion, the results of the previous conversion will be transmitted via DATA while DATACLK provides the synchronous clock for the serial data. The data format is 16-bit, Binary Two’s Complement, and MSB first. Each data bit is valid on both the rising and falling edge of DATACLK. BUSY is LOW during the entire serial transmission and can be used as a frame synchronization signal. Figure 1. Basis Operation, ±10-V Input Range, Internal DATACLK Figure 2 shows a basic circuit to operate the ADS8513 with a ±10-V input range. To begin a conversion, a falling edge must be provided to the CONV input. BUSY will go LOW indicating that a conversion has started and will stay LOW until the conversion is complete. Just prior to BUSY rising near the end of the conversion, the internal working register holding the conversion result will be transferred to the internal shift register. The internal shift register is clocked via the DATACLK input. The recommended method of reading the conversion result is to provide the serial clock after the conversion has completed. See External DATACLK under the Reading Data section of this data sheet for more information. Figure 2. Basic Operation, ±10-V Input Range, External DATACLK 6 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): ADS8513 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |