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TMP88CS38 Datasheet(PDF) 149 Page - Toshiba Semiconductor |
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TMP88CS38 Datasheet(HTML) 149 Page - Toshiba Semiconductor |
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149 / 226 page ![]() TMP88CS38/CM38A/CP38A 2007-09-12 88CS38-149 (1) RGWR system Figure 2.15-5 RGWR System (2) Transfer timing 1. No display area When having set RGWR to “1” during no display area, the timing OSD register can be transferred is at the falling edge of HD signal. Figure 2.15-6 Data Transfer Timing in No Display Area 2. Display area (Including any lines specified as display off by character size) When having set RGWR to “1” during display area, the timing OSD register can be transferred is at the falling edge of HD signal when the display line has been finished. Figure 2.15-7 Data Transfer Timing in Display Area OSD circuit Q D LE Transfer pulse by RGWR = 1 Register specified by RGWR Set RGWR register to “1” Clear RGWR Transfer the contents of OSD registers into OSD circuit Data transfer pulse RGWR register HD Set RGWR register to “1” Clear RGWR Transfer the contents of OSD registers into OSD circuit Data transfer pulse RGWR register HD Display line |
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