ACT8870 datasheet(27/49 Pages) QORVO

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ACT8870

Advanced PMU for Microcontrollers

and Solid State Drive Applications

Data Sheet Rev. 7.0, Feb. 18, 2020 | Subject to change without notice

27 of 49

www.qorvo.com

VIN voltage is above or below the UV or OV thresholds

or any valid output supply voltage is below its Power

Good threshold. After startup, nRESET de-asserts after

a programmable delay time when VIN and all outputs

are above their respective UVLO thresholds. The

nRESET delay time is controlled by the I2C bits

nRST_DLY[2:0], which programs the delay between

200us and 1ms in 114us steps. nRESET is configurable,

so refer to the CMI Options section in the back of the

datasheet for its specific functionality for each CMI.

nRESET is an open drain output and is 5.5V tolerant

meaning that nRESET can be pulled up to 5.5V even if

VIO_IN is less than 5.5V.

EXT_EN

EXT_EN is used to control an external regulator or to

provide a control signal to other system components.

Depending on the MODE pin status, EXT_EN is either

an exact output of the ACT8870’s internal BUCK1

enable signal or an exact output of the bypass switch

enable signal. The I2C bit EXT_EN_POL controls the

EXT_EN polarity. EXT_EN is active high when

EXT_EN_POL is low and EXT_EN is active low when

EXT_EN_POL is high. EXT_EN is a push-pull CMOS

output using VIO_IN supply. Note that the EXT_EN

output is enabled and valid in all modes of operation.

EXT_EN is configurable, so refer to the CMI Options

section in the back of the datasheet for its specific

functionality for each CMI.

PG signals the status of a regulator’s Power Good / UV

comparator. When the regulator is below the Power

Good threshold, the PG pin is pulled low. When above

the threshold, the PG pin is open drain. The PG

functionality is enabled by default, but can be disabled

by I2C.

Disable PG for each regulator using the

regulator’s UV_FLTMSK bit.

PG is configurable, so

refer to the back of the datasheet for its specific

functionality for each CMI. PG is an open drain output

and is 5V tolerant meaning that PG can be pulled up to

5.5V even if VIO_IN is less than 5.5V.

STEP-DOWN DC/DC CONVERTERS

General Description

The ACT8870 contains four fully integrated step-down

converters. Buck1 is a 4A output, while Buck2, Buck3,

and Buck4 are 2.5A outputs. All buck converters are

fixed frequency, current-mode controlled, synchronous

PWM converters that achieve peak efficiencies of up to

96.5%. The buck converters switch at 2.25MHz and are

internally compensated, requiring only three small

external components (Cin, Cout, and L) for operation.

They ship with default output voltages that can be

modified via the I2C interface for systems that require

advanced power management functions.

Each buck converter has a dedicated input pin and

power ground pin. Each buck converter should have a

dedicated input capacitor that is optimally placed to

minimize the power routing loops for each buck

converter. Note that even though each buck converter

has separate inputs, all buck converter inputs must be

connected to the same voltage potential.

Buck 1 is configurable as a bypass switch for systems

with a 3.3V bus voltage. The bypass switch provides full

sequencing capability by allowing the 3.3V bus to be

used as the input to the other supplies and still be

properly sequenced to the downstream load.

Tie MODE to AGND to configure Buck1 for a switching

power supply. Tie MODE to VIN to configure Buck1 as

a bypass switch. MODE is only sampled when VIN

reaches its UVLO threshold. Changing the MODE pin

after startup has no effect. When Buck1 is configured as

a power supply, EXT_EN is a direct output of the

ACT8870 Buck1 enable signal. When Buck1 is

configured as a bypass switch, EXT_EN is a direct

output of the bypass switch enable signal.

The ACT8870 buck regulators are highly configurable

and can be quickly and easily reconfigured via I2C. This

allows

them

support

changes

hardware

requirements without the need for PCB changes.

Examples of I2C functionality are given below:

Real-time power good, OV, and current limit status

Ability to mask individual faults

Dynamically change output voltage

On/Off control

Softstart ramp

Slew rate control

Switching delay and phase control

Low power mode

Overcurrent thresholds

Refer to the Active-Semi Application Note describing the

programming ranges.

ACT8870 Datasheet(PDF) 27 Page - Qorvo, Inc

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