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LM10504

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SNVS739F – DECEMBER 2011 – REVISED OCTOBER 2016

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Copyright © 2011–2016, Texas Instruments Incorporated

(1)

All limits are ensured by design, test, or statistical analysis. All electrical characteristics having room-temperature limits are tested during

production with TJ = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature

variations and applying statistical process control.

(2)

Capacitors: Low-ESR surface-mount ceramic capacitors (MLCCs) are used in setting electrical characteristics.

(3)

BUCK normal operation is ensured if VIN ≥ VOUT + 1 V.

(4)

Specification ensured by design. Not tested during production.

(5)

In applications where high power dissipation or poor thermal resistance is present, the maximum ambient temperature may have to be

derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the

maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the part or

package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).

6.6 Electrical Characteristics – Buck 1

TJ = 25°C and VIN = 5 V where VIN=VIN_B1 = VIN_B2 = VIN_B3 (unless otherwise noted)

(1) (2) (3)

PARAMETER

CONDITIONS

MIN

TYP

MAX UNITS

IQ

VIN DC bias current

No load, PFM mode

TJ = 25°C

15

µA

–30°C

≤ TJ ≤ 85°C

50

IOUT_MAX

Continuous maximum load

current(4)(5)

Buck 1 enabled, switching in PWM,

–30°C

≤ TJ ≤ 85°C

1.6

A

IPEAK

Peak switching current limit

Buck 1 enabled,

switching in PWM

TJ = 25°C

2.1

A

–30°C

≤ TJ ≤ 85°C

1.9

2.6

η

Peak efficiency(4)

IOUT = 0.3 A

90%

FSW

Switching frequency

TJ = 25°C

2

MHz

–30°C

≤ TJ ≤ 85°C

1.75

2.3

CIN

Input capacitor(4)

0 mA

≤ IOUT ≤ IOUT-MAX

4.7

µF

COUT

Output filter capacitor(4)

0 mA

≤ IOUT ≤ IOUT-MAX

10

10

100

Output capacitor ESR(4)

0 mA

≤ IOUT ≤ IOUT-MAX

20

mΩ

L

Output filter inductance(4)

0 mA

≤ IOUT ≤ IOUT-MAX

2.2

µH

ΔVOUT

DC line regulation(4)

3.3 V

≤ VIN ≤ 5 V, IOUT = IOUT-MAX

0.5%

V

DC load regulation(4)

100 mA

≤ IOUT ≤ IOUT-MAX

0.3%

A

IFB

Feedback pin input bias current

VFB = 3 V

TJ = 25°C

2.1

µA

–30°C

≤ TJ ≤ 85°C

5

RDS-ON-HS

High-side switch on resistance

135

mΩ

VIN = 2.6 V

215

RDS-ON-LS

Low-side switch on resistance

TJ = 25°C

85

mΩ

–30°C

≤ TJ ≤ 85°C

190

RDS-ON-BYPASS

Bypass FET on resistance

Used in parallel with the high-side FET while in

bypass mode. Resistance

(DCR) of inductor = 100 mΩ

VIN = 3.3 V

85

mΩ

VIN = 2.6 V

120

START-UP

TSTART

Internal soft-start (turnon time) (4)

Start up from shutdown, VOUT = 0 V, no load,

LC = recommended circuit, using software

enable, to VOUT = 95% of final value

0.1

ms