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TAS3202 Datasheet(PDF) 34 Page - Texas Instruments

Part # TAS3202
Description  AUDIO DSP WITH ANALOG INTERFACE
PDF  69 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS3202 Datasheet(HTML) 34 Page - Texas Instruments

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16-Bit Audio
18-Bit Audio
20-Bit Audio
24-Bit Audio
Precision/Noise Bits
Overhead/
Guard Bits
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TAS3202
SLES208B – JUNE 2009 – REVISED MARCH 2011
www.ti.com
7.1
DAP Instructions Set
Please see this information in the TAS3xxx DAS Instruction Set Reference Guide, available to those
registered to the TAS3xxx-PurePath Studio Extranet.
7.2
DAP Data Word Structure
Figure 7-2 shows the data word structure of the DAP arithmetic unit. Eight bits of overhead or guard bits
are provided at the upper end of the 48-bit DAP word, and 16 bits of computational precision or noise bits
are provided at the lower end of the 48-bit word. The incoming digital audio words are all positioned with
the MSB abutting the 8-bit overhead/guard boundary. The sign bit in bit 39 indicates that all incoming
audio samples are treated as signed data samples The arithmetic engine is a 48-bit (25.23 format)
processor consisting of a general-purpose 76-bit ALU and function-specific arithmetic blocks. Multiply
operations (excluding the function-specific arithmetic blocks) always involve 48-bit DAP words and 28-bit
coefficients (usually I2C programmable coefficients). If a group of products is to be added together, the
76-bit product of each multiplication is applied to a 76-bit adder, where a DSP-like multiply-accumulate
(MAC) operation takes place. Biquad filter computations use the MAC operation to maintain precision in
the intermediate computational stages.
Figure 7-2. Arithmetic Unit Data Word Structure
To maximize the linear range of the 76-bit ALU, saturation logic is not used. In MAC computations,
intermediate overflows are permitted, and it is assumed that subsequent terms in the computation flow
correct the overflow condition (see Figure 7-3). The DAP memory banks include a dual port data RAM for
storing intermediate results, a coefficient RAM, and a fixed program ROM. Only the coefficient RAM,
accessible via the I2C bus, is available to the user.
Figure 7-3. DSP ALU Operation With Intermediate Overflow
34
Digital Audio Processor (DAP) Arithmetic Unit
Copyright © 2009–2011, Texas Instruments Incorporated
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