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TAS3202 Datasheet(PDF) 46 Page - Texas Instruments |
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TAS3202 Datasheet(HTML) 46 Page - Texas Instruments |
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46 / 69 page  TAS3202 SLES208B – JUNE 2009 – REVISED MARCH 2011 www.ti.com 9 I 2C Register Map I2C registers are also mapped to some of the Extended Special Function Registers (ESFRs). They are defined in the following sections. Table 9-1. I2C Register Map NO. OF INITIALIZATION SUBADDRESS REGISTER NAME CONTENTS BYTES VALUE 0x00 Clock Control Register 4 Description shown in Section 9.1 0x00, 0x40, 0x1B, 0x22 0x01 Reserved 4 Reserved 0x00, 0x00, 0x00, 0x40 0x02 Status Register 4 Description shown in Section 9.2 0x00, 0x00, 0x03, 0xFF 0x03 Unused 0x00, 0x00, 0x00, 0x00 0x00, 0x00, 0x00, 0x00 0x04 I2C Memory Load Control 8 Description shown in Section 9.3 0x00, 0x00, 0x00, 0x00 0x00, 0x00, 0x00, 0x00 0x05 I2C Memory Load Data 8 Description shown in Section 9.3 0x00, 0x00, 0x00, 0x00 u(31:24)(1), MemSelect(23:16), 0x06 Memory Access Register 1 4 0x00, 0x00, 0x00, 0x00 Addr(15:8), Addr(7:0) D(63:56), D(55:48), D(47:40), 0x00, 0x00, 0x00, 0x00 0x07 Memory Access Register 2 16 D(39:32), D(31:24), D(23:16), 0x00, 0x00, 0x00, 0x00 D(15:8), D(7:0) 0x08 Device Version 4 TAS3202 version 0x00, 0x00, 0x00, 0x01 0x09 Unused Unused Unused Unused 0x10 Analog Power Down Control 1 4 Analog Power Down Control 1 0x00, 0x00, 0x00, 0x1F 0x11 Analog Power Down Control 2 4 Analog Power Down Control 2 0x00, 0x00, 0x00, 0xFF 0x12 Analog Input Control 4 Analog Input Control 0x00, 0x00, 0x00, 0x01 0x13 ADC Dynamic Element Matching 4 ADC Dynamic Element Matching 0x00, 0x00, 0x00, 0x08 0x14 Unused 4 Unused 0x00, 0x00, 0x00, 0x00 0x15 Unused 4 Unused 0x00, 0x00, 0x00, 0x00 0x16 Unused Unused 0x17 ADC Current Control 1 4 ADC Current Control 1 0x00, 0x00, 0x00, 0x00 0x18 ADC Current Control 2 4 ADC Current Control 2 0x00, 0x00, 0x00, 0x00 0x19 Unused 4 Unused 0x1A DAC Control 1 4 DAC Control 1 0x00, 0x00, 0x00, 0x00 0x1B DAC Control 2 4 DAC Control 2 0x00, 0x00, 0x00, 0x00 0x1C Unused 4 Analog Test Modes 0x00, 0x00, 0x00, 0x00 0x1D DAC Control 3 4 DAC Modulator Dither 0x00, 0x00, 0x00, 0x00 0x1E ADC and DAC Reset 4 ADC/DAC Digital Reset 0x00, 0x00, 0x00, 0x00 0x1F Analog Input Gain Select Analog Input Gain Select 0x00, 0x00, 0x00, 0x00 0x20 Unused 4 Clock Delay Setting ADC 0x00, 0x00, 0x00, 0x00 0x21 MCLK_OUT2 Divider 4 MCLK_OUT2 Divider 0x00, 0x00, 0x00, 0x05 0x22 MCLK_OUT3 Divider 4 MCLK_OUT3 Divider 0x00, 0x00, 0x00, 0x00 0x30–0x3F Digital Cross Bar 32 Digital Cross Bar See Section 9.14 (1) u indicates unused bits. In the following sections, BOLD indicates the default state of the bit fields. 46 Copyright © 2009–2011, Texas Instruments Incorporated I2C Register Map Submit Documentation Feedback Product Folder Link(s): TAS3202 |
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