TAS3202 datasheet(42/69 Pages) TI2

42 / 69 page

tr(SCLKOUT)

tf(SCLKOUT)

tsk

tr(SCLKOUT)

tpd1(SCLKOUT2)

tpd1(SCLKOUT1)

tf(LRCLK), tr(LRCLK)

tpd2

tsu

SCLKOUT2

LRCLK

(Output)

SDOUT

SDIN

SCLKOUT1

TAS3202

SLES208B – JUNE 2009 – REVISED MARCH 2011

www.ti.com

8.9

Serial Audio Port, Master Mode (TAS3202)

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

f(LRCLK)

Frequency LRCLK

CL = 30 pF

kHz

tr(LRCLK)

Rise time, LRCLK (1)

CL = 30 pF

tf(LRCLK)

Fall time, LRCLK (1)

Duty cycle is 50/50

f(SCLKOUT)

Frequency, SCLKOUT

CL = 30 pF

64FS

MHz

tr(SCLKOUT)

Rise time, SCLKOUT

CL = 30 pF

tf(SCLKOUT)

Fall time, SCLKOUT

CL = 30 pF

tpd1(SCLKOUT)

Propagation delay, SCLKOUT falling edge to LRCLK edge

tpd2

Propagation delay, SCLKOUT falling edge to SDOUT

tsu

Setup time, SDIN to SCLKOUT rising edge

Hold time, SDIN from SCLKOUT rising edge

(1)

Rise time and fall time measured from 20% to 80% of maximum height of waveform.

Figure 8-5. Serial Audio Port Master Mode Timing Waveforms

Electrical Specifications

Submit Documentation Feedback

Product Folder Link(s): TAS3202

TAS3202 Datasheet(PDF) 42 Page - Texas Instruments

TAS3202 Datasheet(HTML) 42 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69

Datasheet Download

Link URL