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ST7789 Datasheet(PDF) 50 Page - Sitronix Technology Co., Ltd. |
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ST7789 Datasheet(HTML) 50 Page - Sitronix Technology Co., Ltd. |
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50 / 316 page ![]() ST7789VI Version 1.4 Page 50 of 315 2014/04 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. 8 FUNCTION DESCRIPTION 8.1 MPU Interface Type Selection ST7789VI supports 8/16/9/18 bit parallel data bus for 8080 series CPU, RGB serial interfaces. Selection of these interfaces are set by IM[3:0] pins as shown below. IM3 IM2 IM1 IM0 Interface Read Back Data Bus Selection 0 0 0 0 80-8bit parallel I/F DB[7:0] 0 0 0 1 80-16bit parallel I/F DB[15:0] 0 0 1 0 80-9bit parallel I/F DB[8:0] 0 0 1 1 80-18bit parallel I/F DB[17:0], 0 1 0 1 3-line 9bit serial I/F SDA: in/out 2 data lane serial I/F SDA: in/out, WRX: in 0 1 1 0 4-line 8bit serial I/F SDA: in/out 1 0 0 0 80-16bit parallel I/F Ⅱ DB[17:10], DB[8:1] 1 0 0 1 80-8bit parallel I/F Ⅱ DB[17:10] 1 0 1 0 80-18bit parallel I/F Ⅱ DB[17:0], 1 0 1 1 80-9bit parallel I/F Ⅱ DB[17:9] 1 1 0 1 3-line 9bit serial I/F Ⅱ SDA: in/ SDO: out 1 1 1 0 4-line 8bit serial I/F Ⅱ SDA: in/ SDO: out Table 10 Interface Type Selection |
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