SID1182K datasheet(3/24 Pages) POWERINT

3 / 24 page

Rev. H 09/19

SID11x2K

SCALE-iDriver Functional Description

The single channel SCALE-iDriver

™ family is designed to drive IGBTs

and MOSFETs or other semiconductor power switches with a blocking

voltage of up to 1200 V and provide reinforced isolation between

micro-controller and the power semiconductor switch. The logic

input (PWM) command signals applied via the IN pin and the primary

supply voltage supplied via the VCC pin are both reference to the

GND pin. The working status of the power semiconductor switch and

SCALE-iDriver is monitored via the SO pin.

PMW command signals are transferred from the primary (IN) to

secondary-side via FluxLink isolation technology. The GH pin supplies

a positive gate voltage and charges the semiconductor gate during

the turn-on process. The GL pin supplies the negative voltage and

discharges the gate during the turn-off process.

Short-circuit protection is implemented using a desaturation detection

technique monitored via the VCE pin. After the SCALE-iDriver detects

a short-circuit, the semiconductor turn-off process is implemented

using an Advanced Soft Shut Down (ASSD) technique.

Power Supplies

The SID11x2K requires two power supplies. One is the primary-side

VCC) which powers the primary-side logic and communication with

the secondary (insulated) side. One supply voltage is required for the

secondary-side, V

TOT is applied between the VISO pin and the COM

pin. V

TOT needs to be insulated from the primary-side and must

provide at least the same insulation capabilities as the SCALE-iDriver.

TOT must have a low capacitive coupling to the primary or any other

secondary-side. The positive gate-emitter voltage is provided by V

VISO

which is internally generated and stabilized to 15 V (typically) with

respect to VEE. The negative gate-emitter voltage is provided by V

VEE

with respect to COM. Due to the limited current sourcing capabilities

of the VEE pin, any additional load needs to be applied between the

VISO and COM pins. No additional load between VISO and VEE pins

or between VEE and COM pins is allowed.

Input and Fault Logic (Primary-Side)

The input (IN) and output (SO) logic is designed to work directly with

micro-controllers using 5 V CMOS logic. If the physical distance

between the controller and the SCALE-iDriver is large or if a different

logic level is required the resistive divider in Figure 5, or Schmitt-trigger

ICs (Figures 13 and 14) can be used. Both solutions adjust the logic level

as necessary and will also improve the driver’s noise immunity.

Gate driver commands are transferred from the IN pin to the GH and

GL pins with a propagation delay t

P(LH) and tP(HL).

During normal operation, when there is no fault detected, the SO pin

stays at high impedance (open). Any fault is reported by connecting

the SO pin to GND. The SO pin stays low as long as the V

VCC voltage

(primary-side) stays below UVLO

VCC, and the propagation delay is

negligible. If desaturation is detected (there is a short-circuit), or the

supply voltages V

VISO, VVEE, (secondary-side) drop below UVLOVISO,

UVLO

VEE, the SO status changes with a delay time tFAULT and keeps

status low for a time defined as t

SO. In case of a fault condition the

driver applies the off-state (the GL pin is connected to COM). During

the t

SO period, command signal transitions from the IN pin are

ignored. A new turn-on command transition is required before the

driver will enter the on-state.

The SO pin current is defined as I

SO; voltage during low status is

defined as V

SO(FAULT).

Output (Secondary-Side)

The gate of the power semiconductor switch to be driven can be

connected to the SCALE-iDriver output via pins GH and GL, using two

different resistor values. Turn-on gate resistor R

GON needs to be

connected to the GH pin and turn-off gate resistor R

GOFF to the GL pin.

If both gate resistors have the same value, the GL and GH pins can be

connected together. Note: The SCALE-iDriver data sheet defines the

GH and RGL values as total resistances connected to the respective

pins GH and GL. Note that most power semiconductor data sheets

specify an internal gate resistor R

GINT which is already integrated into

the power semiconductor switch. In Addition to R

GINT, external

resistor devices R

GON and RGOFF are specified to setup the gate current

levels to the application requirements. Consequently, R

GH is the sum

of R

GON and RGINT, as shown in Figures 9 and 10. Careful consideration

should be given to the power dissipation and peak current associated

with the external gate resistors.

The GH pin output current source (I

GH) of SID1182K is capable of

handling up to 7.3 A during turn-on, and the GL pin output current

source (I

GL) is able to sink up to 8.0 A during turn-off. The SCALE-

iDriver’s internal resistances are described as R

GHI and RGLI respec-

tively. If the gate resistors for SCALE-iDriver family attempt to draw

a higher peak current, the peak current will be internally limited to a

safe value, see Figures 6 and 7. Figure 8 shows the peak current

Figure 5. Increased Threshold Voltages V

IN+LT and VIN+HT. For R1 = 3.3 kW and

2 = 1 kW the IN Logic Level is 15 V.

Figure 6. Turn-On Peak Output Current (Source) vs. Ambient Temperature.

Conditions: VCC = 5 V, V

TOT = 25 V, fS = 20 kHz, Duty Cycle = 50%.

-60 -40

-20

100 120 140

Ambient Temperature (°C)

RGH = 4 Ω, RGL = 3.4 Ω, CLOAD = 47 nF

RGH = 4 Ω, RGL = 3.4 Ω, CLOAD = 100 nF

RGH = RGL = 0 Ω, CLOAD = 47 nF

PI-7950-050916

SCALE-iDriver

VCC

GND

RSO

SID1182K Datasheet(PDF) 3 Page - Power Integrations, Inc.

SID1182K Datasheet(HTML) 3 Page - Power Integrations, Inc.

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