AD7148 datasheet(34/56 Pages) AD

34 / 56 page

AD7148

Rev. 0 | Page 34 of 56

The AD7148 address space is divided into three different register

banks, referred to as Register Bank 1, Register Bank 2, and Register

Bank 3. Figure 46 illustrates the division of these three banks.

Bank 1 registers contain control registers, CDC conversion

control registers, interrupt enable registers, interrupt status

registers, CDC 16-bit conversion data registers, device ID

registers, and proximity status registers.

Bank 2 registers contain the configuration registers used for

uniquely configuring the CINx inputs for each conversion stage.

Initialize the Bank 2 configuration registers immediately after

power-up to obtain valid CDC conversion result data.

Bank 3 registers contain the results of each conversion stage.

These registers automatically update at the end of each conversion

sequence. Although these registers are primarily used by the

AD7148 internal data processing, they are accessible by the host

processor for additional external data processing, if desired.

Default values are undefined for Bank 2 registers and Bank 3

registers until after power-up and configuration of the Bank 2

registers.

ADDR 0x000

ADDR 0x018

ADDR 0x001

ADDR 0x005

ADDR 0x008

ADDR 0x00B

ADDR 0x017

ADDR 0x013

ADDR 0x7F0

ADDR 0x080

ADDR 0x0B8

ADDR 0x088

ADDR 0x090

ADDR 0x098

ADDR 0x0A0

ADDR 0x0A8

ADDR 0x0B0

ADDR 0x0E0

ADDR 0x1DC

ADDR 0x104

ADDR 0x128

ADDR 0x14C

ADDR 0x170

ADDR 0x194

ADDR 0x1B8

ADDR 0x042

ADDR 0x043

INVALID DO NOT ACCESS

PROXIMITY STATUS REGISTER

INVALID DO NOT ACCESS

DEVICE ID REGISTER

CDC 16-BIT CONVERSION DATA

(8 REGISTERS)

INTERRUPT STATUS

(3 REGISTERS)

INTERRUPT ENABLE

(3 REGISTERS)

CALIBRATION AND SETUP

(4 REGISTERS)

SETUP CONTROL

(1 REGISTER)

STAGE7 CONFIGURATION

(8 REGISTERS)

STAGE6 CONFIGURATION

(8 REGISTERS)

STAGE5 CONFIGURATION

(8 REGISTERS)

STAGE4 CONFIGURATION

(8 REGISTERS)

STAGE3 CONFIGURATION

(8 REGISTERS)

STAGE2 CONFIGURATION

(8 REGISTERS)

STAGE1 CONFIGURATION

(8 REGISTERS)

STAGE0 CONFIGURATION

(8 REGISTERS)

STAGE7 RESULTS

(36 REGISTERS)

STAGE6 RESULTS

(36 REGISTERS)

STAGE5 RESULTS

(36 REGISTERS)

STAGE4 RESULTS

(36 REGISTERS)

STAGE3 RESULTS

(36 REGISTERS)

STAGE2 RESULTS

(36 REGISTERS)

STAGE1 RESULTS

(36 REGISTERS)

STAGE0 RESULTS

(36 REGISTERS)

UNUSED (4 REGISTERS)

Figure 46. Layout of Bank 1 Registers, Bank 2 Registers, and Bank 3 Registers

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