3

CDCE937-Q1, CDCEL937-Q1

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SCAS892C – FEBRUARY 2010 – REVISED DECEMBER 2016

Product Folder Links: CDCE937-Q1 CDCEL937-Q1

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5 Description (continued)

Furthermore, each output can be programmed in-system for any clock frequency up to 230 MHz through the

integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down

and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to

pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three user-defined control pins. This

eliminates the additional interface requirement to control the clock. Specific power-up and power-down

sequences can also be defined to the user's needs.

6 Device Comparison Table

DEVICE

SUPPLY (V)

PLL

OUTPUT

CDCE913-Q1

2.5 to 3.3

1

3

CDCEL913-Q1

1.8

1

3

CDCE937-Q1

2.5 to 3.3

3

7

CDCEL937-Q1

1.8

3

7

CDCE949-Q1

2.5 to 3.3

4

9

CDCEL949-Q1

1.8

4

9