Y4

Y5

VDD

GND

Vctr

Vddout

S2/S1/S0 or

SDA/SCL

Y1

VCXO

XO

LVCMOS

3

Y2

Y3

LV

CMOS

LV

CMOS

PLL1

with SSC

LV

CMOS

LV

CMOS

LV

CMOS

PLL2

with SSC

Y6

Y7

LV

CMOS

LV

CMOS

PLL3

with SSC

Divider

and

Output

Control

Programming

and

Control Register

EEPROM

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

CDCE937-Q1, CDCEL937-Q1

SCAS892C – FEBRUARY 2010 – REVISED DECEMBER 2016

CDCEx937-Q1 Programmable 3-PLL VCXO Clock Synthesizer

With 1.8-V, 2.5-V, and 3.3-V LVCMOS Outputs

1

1 Features

1

•

Qualified for Automotive Applications

•

AEC-Q100 Qualified With the Following Results:

–

Device Temperature Grade 1: –40°C to 125°C

Ambient Operating Temperature Range

–

Device HBM ESD Classification Level 2

–

Device CDM ESD Classification Level C4B

•

In-System Programmability and EEPROM

–

Serial Programmable Volatile Register

–

Nonvolatile EEPROM to Store Customer

Setting

•

Flexible Input Clocking Concept

–

External Crystal: 8 MHz to 32 MHz

–

On-Chip VCXO: Pull Range ±150 ppm

–

Single-Ended LVCMOS up to 160 MHz

•

Free Selectable Output Frequency up to 230 MHz

•

Low-Noise PLL Core

–

Integrated PLL Loop Filter Components

–

Low Period Jitter (Typical 60 ps)

•

Separate Output Supply Pins

–

CDCE937-Q1: 3.3 V and 2.5 V

–

CDCEL937-Q1: 1.8 V

•

Flexible Clock Driver

–

Three User-Definable Control Inputs

[S0/S1/S2]; for Example: SSC Selection,

Frequency Switching, Output Enable or Power

Down

–

Generates Highly Accurate Clocks for Video,

Audio, USB, IEEE1394, RFID, Bluetooth™,

WLAN, Ethernet™, and GPS

–

Generates Common Clock Frequencies Used

With TI-DaVinci™, OMAP™, DSPs

–

Programmable SSC Modulation

–

Enables 0-PPM Clock Generation

•

1.8-V Device Power Supply

•

Wide Temperature Range –40°C to 125°C

•

Packaged in TSSOP

•

Development and Programming Kit for Easy PLL

Design and Programming (TI Pro-Clock™)

2 Applications

•

Clusters

•

Head Units

•

Navigation Systems

•

Advanced Driver Assistance Systems (ADAS)

3 Description

The CDCE937-Q1 and CDCEL937-Q1 devices are

modular,

phase-locked

loop

(PLL)

based

programmable clock synthesizers. These devices

provide flexible and programmable options, such as

output clocks, input signals, and control pins, so that

the user can configure the CDCEx937-Q1 for their

own specifications.

The CDCEx937-Q1 generates up to seven output

clocks from a single input frequency to enable both

board space and cost savings. Additionally, with

multiple outputs, the clock generator can replace

multiple crystals with one clock generator. This

makes the device well-suited for head unit and

telematics applications in infotainment and camera

systems in ADAS as these platforms are evolving into

smaller and more cost effective systems.

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

CDCE937-Q1,

CDCEL937-Q1

TSSOP (20)

6.50 mm × 4.40 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Simplified Block Diagram