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CDCE937 Datasheet(PDF) 13 Page - Texas Instruments

Part # CDCE937
Description  CDCEx937-Q1 Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V LVCMOS Outputs
PDF  39 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CDCE937 Datasheet(HTML) 13 Page - Texas Instruments

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CDCE937-Q1, CDCEL937-Q1
www.ti.com
SCAS892C – FEBRUARY 2010 – REVISED DECEMBER 2016
Product Folder Links: CDCE937-Q1 CDCEL937-Q1
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Copyright © 2010–2016, Texas Instruments Incorporated
(1)
Center/Down-Spread, Frequency0/1 and State0/1 are user-definable in PLLx Configuration Register;
(2)
Frequency0 and Frequency1 can be any frequency within the specified fVCO range.
(3)
State0/1 selection is valid for both outputs of the corresponding PLL module and can be power down,
3-state, low or active
Table 2. PLLx Setting (Can Be Selected For Each PLL Individual)(1)
SSC SELECTION (CENTER/DOWN)
SSCx [3-BITS]
CENTER
DOWN
0
0
0
0% (off)
0% (off)
0
0
1
±0.25%
–0.25%
0
1
0
±0.5%
–0.5%
0
1
1
±0.75%
–0.75%
1
0
0
±1.0%
–1.0%
1
0
1
±1.25%
–1.25%
1
1
0
±1.5%
–1.5%
1
1
1
±2.0%
–2.0%
FREQUENCY SELECTION(2)
FSx
FUNCTION
0
Frequency0
1
Frequency1
OUTPUT SELECTION(3) (Y2 ... Y7)
YxYx
FUNCTION
0
State0
1
State1
(1)
State0 and State1 are user definable in Generic Configuration
Register and can be power down, 3-state, low, or active.
Table 3. Y1 Setting(1)
Y1 SELECTION
Y1
FUNCTION
0
State 0
1
State 1
S1/SDA and S2/SCL pins of the CDCEx937-Q1 are dual function pins. In default configuration they are defined
as SDA and SCL for the serial interface. They can be programmed as control-pins (S1/S2) by setting the relevant
bits in the EEPROM. Note that the changes to the Control register (Bit [6] of Byte [02]) have no effect until they
are written into the EEPROM.
Once they are set as control pins, the serial programming interface is no longer available. However, if VDDOUT is
forced to GND, the two control-pins, S1 and S2, temporally act as serial programming pins (SDA and SCL).
S0 is not a multi-use pin, it is a control pin only.
10.3.2 Default Device Setting
The internal EEPROM of CDCEx937-Q1 is preconfigured as shown in Figure 6. The input frequency is passed
through to the output as a default. This allows the device to operate in default mode without the extra production
step of program it. The default setting appears after power is supplied or after power-down or power-up
sequence until it is re-programmed by the user to a different application configuration. A new register setting is
programmed through the serial SDA and SCL interface.



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