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DAC38RF80IAAV Datasheet(PDF) 72 Page - Texas Instruments

Part # DAC38RF80IAAV
Description  DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL
PDF  160 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC38RF80IAAV Datasheet(HTML) 72 Page - Texas Instruments

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FS
IOUT
IOUT +
IOUT-
(11)
Since the output stage is a current sinking architecture, we will denote current into the DAC as + current, and the
current flows IOUT+ and IOUT- into terminals VOUT1/2+ and VOUT1/2- respectively. IOUT+ and IOUT- can be
expressed as:
FS
IOUT
CODE
IOUT+
16384
u
(12)
FS
IOUT
CODE
IOUT-
16383
16384
u
(13)
where CODE is the decimal representation of the 14-bit DAC core data input word. Note the signal path up to the
DAC is 16-bits and the 2 LSBs are truncated for the DAC core data input word.
7.3.28 DAC Transfer Function for DAC38RF83, 93, 85
The DAC38RF83/93/85 has a differential output and is terminated internally with a differential 100-Ω load. The
DAC38RF83/93/85 output compliance range is 1.3 to 2.3 V. Note that care should be taken not to exceed the
compliance voltages at node VOUT1/2+ and VOUT1/2-, which would lead to increased signal distortion.
Referring again toFigure 7-27, denote the external impedance as seen by VOUT1/2+ as Zext+ and by VOUT1/2-
as Zext-. Note that Zext+ and Zext- should terminate to VDDOUT18 to supply the output current for the DAC.
Also, Zext+ and Zext- are ideally identical to maintain the differential balance of the output. The voltage at nodes
VOUT1/2+ and VOUT1/2- generated by the current flow through the impedance is
IOUT +
Zext +
IOUT - Zext -
VOUT
Zext +
Zext +
Zext +
Zext -
Zext +
Zext -
100
1 / 2
100
u
u
u
u
(14)
IOUT -
Zext -
IOUT + Zext +
VOUT
Zext +
Zext -
Zext +
Zext -
Zext +
Zext -
100
1/ 2
100
u
u
u
u
(15)
The DAC38RF83/93/85 can be easily configured to drive a doubly terminated 50-Ω cable using a properly
selected 2:1 RF transformer (Figure 7-28). Note that the center tap of the primary input of the transformer has
to be connected to the VDDOUT18 supply (nominally 1.8 V) to enable a DC current flow into the DAC. The AC
load impedance as seen through 2:1 transformer is 100 Ω, which is split equally into Zext+ = Zext- = 50 Ω. The
DC impedance for the transformer is a short to the center tap of the transformer, which drives the common mode
of VOUT1/2+ and VOUT1/2- to 1.8V. To calculate the peak to peak output swing VOUT1/2PP at each node, the
equations above simplify to:
FS
FS
PP
IOUT+ IOUT
IOUT
IOUT- IOUT
IOUT+
VOUT
VOUT
VOUT
,
0
,
0
1 / 2
1 / 2
1 / 2
(16)
FS
FS
PP
FS
IOUT
IOUT
VOUT
IOUT
50
1 / 2
25
200
u
u
u
u
u
(17)
With IOUTFS = 40 mA, the swing becomes 1 VPP at each node. With the common mode at 1.8 V due to the
center tap, the voltage at VOUT1/2+ and VOUT1/2- varies between 1.3 and 2.3 V, which is the compliance range
of the DAC.
The differential output swing is 2x VOUT1/2PP, or 2 VPPDIFF. On the load side of the transformer, this reduces to
1.414 VPP, for a transferred load power of 7 dBm (assuming no loss).
DAC38RF80, DAC38RF83, DAC38RF84
DAC38RF85, DAC38RF90, DAC38RF93
SLASEA3D – DECEMBER 2016 – REVISED DECEMBER 2023
www.ti.com
72
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: DAC38RF80 DAC38RF83 DAC38RF84 DAC38RF85 DAC38RF90 DAC38RF93



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