LAN8818D datasheet(47/101 Pages) MICROCHIP

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LAN8818D

DS00005832C-page 47

bit (logic low).

- The first six octets are Seconds in IEEE 1588-2008 format. The device will use these octets to load the LTC.

- The next six octets are Date in 0xYYMMHHMMSS decimal format. These octets are ignored by the device.

- The final four octets are Reserved. These octets are ignored by the device.

• Idle: A gap of 999819 µs (logic low) between TOD and the next PPS rising edge

The format of the 1588 Serial Timestamp Interface is detailed in Section 6.6.13, "1588 Serial Timestamp Interface (STI)

Format and Timing":

• Port is the 5-bit PHY Address.

• Frame Signature is the 16-bit value from the PCH/MCH header.

• TimeStamp is the 80-bit departure timestamp

- 48 bits seconds

- 30 bits nanoseconds (upper two bits = 2’b0)

The 1588 Serial Timestamp Interface is configurable as follows:

• 1588_STI_CLK pin frequency is configurable between 13.89 MHz and 62.5 MHz, based on dividing the system

125 MHz clock by integer values between [2, 8]. It is also configurable to the 1588_STI_DO clock output based on

rising or falling edge.

• Number of 1588_STI_CLK periods (1588_STI_CS_N de-asserted) between consecutive timestamp outputs.

• Number of 1588_STI_CLKs between 1588_STI_CS_N assertion and first valid bit of 1588_STI_DO.

• Enable/Disable of the 1588 STI. Egress timestamps and signatures may either be read by software from internal

registers (1588 STI Disabled) or are pushed off-chip via the 1588 STI (1588 STI Enabled).

The ePPS format is detailed in Section 6.6.10, "1588_REF_CLK Reference Clock Timing".

To use external 1588 Interface pins they must be enabled as GPIOs and GPIO Alternate Functions. GPIO Buffer Type

and GPIO Direction must also be set appropriately.

5.9.6

1588 LOCAL TIME EVENTS

The 1588 Local Time Events block is responsible for generating and controlling all 1588 Local Time related events. One

Local Time Event channel B is available.

A block diagram of the 1588 Local Time Events is shown in Figure 5-7.

For the Local Time Event B channel, a comparator compares the 1588 Local Time Counter with a Local Time Target

loaded in the PTP LTC Target x Seconds High/Low Registers (PTP_LTC_TARGET_SEC_HI/LO_x) and PTP LTC Target

x Nanoseconds High/Low Registers (PTP_LTC_TARGET_NS_HI/LO_x). Only the lower 32 bits of seconds is consid-

ered.

The Local Time Target register set for channel B requires four 16-bit write cycles, one to each quarter, before the register

set is affected. The writes may be in any order.

The Local Time Target can be read by setting the LTC Target Read (PTP_LTC_TARGET_READ) bit in the PTP Com-

mand and Control register (PTP_CMD_CTL). This saves the current value of the Local Time Target into the PTP LTC

Target x Seconds High/Low Registers (PTP_LTC_TARGET_SEC_HI/LO_x) and PTP LTC Target x Nanoseconds High/

Low Registers (PTP_LTC_TARGET_NS_HI/LO_x) where they can be read.

FIGURE 5-7:

1588 LOCAL TIME EVENTS TARGET BLOCK DIAGRAM

IEEE 1588 Local Time Events

compare >=

load / add

host

1588 Clock

Reload / Add B

Clock Target B

IRQ Flag B

GPIO Events

GPIO Clears

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