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LAN8818D Datasheet(PDF) 56 Page - Microchip Technology

Part # LAN8818D
Description  4-Port Gigabit Ethernet Transceiver with QSGMII
PDF  101 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8818D Datasheet(HTML) 56 Page - Microchip Technology

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LAN8818D
DS00005832C-page 56
© 2026 Microchip Technology Inc. and its subsidiaries
5.14.3
EXTERNAL CONNECTOR LOOPBACK
The external connector loopback testing feature allows the twisted pair interface to be looped back externally. This loop-
back tests the PHY digital and MAC connectivity. When using this feature, the PHY must be connected to a loopback
connector or a loopback cable. Pair A must be connected to pair B, and pair C to pair D, as shown in Figure 5-11. The
connector loopback feature functions at all available interface speeds.
5.14.4
QSGMII/Q-USGMII LOOPBACK
This QSGMII/Q-USGMI loopback testing feature calls various portions of the QSGMII/Q-USGMI block to be tested, as
shown in Figure 5-11. When frames are looped in the QSGMII/Q-USGMII PCS1G, individual ports are looped, not the
entire QSGMII/Q-USGMII. When frames are looped in the QSGMII/Q-USGMI SerDes, all four ports are looped.
FIGURE 5-11:
EXTERNAL CONNECTOR LOOPBACK
FIGURE 5-12:
QSGMII/Q-USGMII LOOPBACK
PCS
PMA
LAN8818D
MAC
Switch or SoC
GPHY Port X
PCS1G
Port X
PCS1G
PCS1G
PCS1G
Other
Ports
MAC
MAC
MAC
Port X
QSGMII/Q-USGMII
A
B
C
D
QSGMII PCS1G TBI Loopback
PCS
PMA
LAN8818D
MAC
Switch or SoC
Link
Partner
GPHY Port X
PCS1G
Port X
Other
Ports
MAC
MAC
MAC
Port X
QSGMII/Q-USGMII
PCS1G
PCS1G
PCS1G
PCS
PMA
LAN8818D
MAC
Switch or SoC
Link
Partner
GPHY Port X
PCS1G
Port X
Other
Ports
MAC
MAC
MAC
Port X
QSGMII/Q-USGMII
PCS1G
PCS1G
PCS1G
QSGMII PCS1G GMII Loopback
LAN8818D
MAC
Switch or SoC
MAC
MAC
MAC
QSGMII/Q-USGMII
QSGMII SerDes Loopback
PCS
PMA
Link
Partner
GPHY
PCS1G
Port 3
PCS
PMA
Link
Partner
GPHY
PCS1G
Port 2
PCS
PMA
Link
Partner
GPHY
PCS1G
Port 1
PCS
PMA
Link
Partner
GPHY
PCS1G
Port 0



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