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SH7124 Datasheet(PDF) 78 Page - Renesas Technology Corp |
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SH7124 Datasheet(HTML) 78 Page - Renesas Technology Corp |
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78 / 782 page  Section 4 Clock Pulse Generator (CPG) Rev. 3.00 Sep. 27, 2007 Page 58 of 758 REJ09B0243-0300 Table 4.1 shows the operating clock for each module. Table 4.1 Operating Clock for Each Module Operating Clock Operating Module Operating Clock Operating Module Internal clock (I φ) CPU Peripheral clock (P φ) POE UBC SCI ROM A/D RAM CMT WDT Bus clock (B φ) MTU2 clock (MP φ) MTU2 4.2 Input/Output Pins Table 4.2 shows the CPG pin configuration. Table 4.2 Pin Configuration Pin Name Abbr. I/O Description XTAL Output Connects a crystal resonator. Crystal input/output pins (clock input pins) EXTAL Input Connects a crystal resonator or an external clock. |
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