PRSP0016JC-B datasheet(43/85 Pages) RENESAS

43 / 85 page

RL78/G16

2. ELECTRICAL SPECIFICATIONS (TA

= −40 to +85°C)

R01DS0431EJ0130

Rev.1.30

Page 43 of 85

May 19, 2025

2.5.2

Serial interface IICA

[TA =

−40 to +85°C, 2.4 V ≤ VDD ≤ 5.5 V, VSS = 0 V]

Item

Symbol

Condition

Standard Mode

Fast Mode

Unit

MIN.

MAX.

MIN.

MAX.

SCLA0 clock frequency

fSCL

Fast mode:

fCLK

≥ 3.5 MHz

400

kHz

Standard mode:

fCLK

≥ 1 MHz

100

kHz

Setup time of restart condition

tSU:STA

4.7

0.6

µs

Hold timeNote 1

tHD:STA

4.0

0.6

µs

Hold time when SCLA0 = “L”

tLOW

4.7

1.3

µs

Hold time when SCLA0 = “H”

tHIGH

4.0

0.6

µs

Data setup time (reception)

tSU:DAT

250

100

Data hold time (transmission)Note 2

tHD:DAT

3.45

0.9

µs

Setup time of stop condition

tSU:STO

4.0

0.6

µs

Bus-free time

tBUF

4.7

1.3

µs

Note 1.

The first clock pulse is generated after this period when the start or restart condition is detected.

Note 2.

The maximum value (MAX.) of tHD:DAT applies to normal transfer and a wait is inserted at the ACK

(acknowledge) timing.

Remark

The maximum value of Cb (communication line capacitance) and the value of Rb (communication line pull-up

resistance) at that time in each mode are as follows.

Standard mode: Cb = 400 pF, Rb = 2.7 k

Ω

Fast mode: Cb = 200 pF, Rb = 1.7 k

Ω

IICA serial transfer timing

tLOW

tHIGH

tHD:STA

tBUF

Stop

condition

tHD:DAT

SCLA0

SDAA0

Start

condition

Restart

condition

Stop

condition

tSU:DAT

tSU:STA

tHD:STA

tSU:STO

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