TSB21LV03

IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER

SLLS230A – MARCH 1996 – REVISED DECEMBER 1996

24

POST OFFICE BOX 655303

APPLICATION INFORMATION

Phy

LPS

300

Ω

3.3 VP

5 k

Ω

TIL191A

3.3 VL

Figure 14. Implementation of Isolation for DC LPS Signal Using TIL191A Optoisolator

A note on optoisolators, it is recommended that optoisolators only be used on slow signals (times in ms) like

RESET or PD that are essentially dc signals. There currently are no known optoisolators that have a large

enough bandwidth and low enough latency to meet the requirements of the data and control lines of the phy-LLC

interface. Since each system is different and requires different sequences associated with startup and power

down, it falls back to the system designer to be responsible to check all possible conditions that can occur on

the phy-LLC interface to ensure that this type of a nonsynchronized state either does not occur or is resolved

correctly.

Table 3. Phy-LLC Interface Initial Signal States

SIGNALS

PHY DEVICES†

LLC DEVICES†

SIGNALS

TSB21LV03

TSB11LV01

TSB11C01

TSB12C01A

TSB12LV21

TSB12LV31

Phy-LLC Data

L

L

L

I

I

I

Phy-LLC CTL

L

L

L

I

I

I

SCLK

49.152 MHz

49.152 MHz

49.152 MHz

I

I

I

LREQ

I

I

I

L

L

L

LPS

L

I

I

N/A

N/A

N/A

Power-On

N/A

N/A

N/A

BCLK/32

N/A

BCLK/32

RESET

I

I

I

I

I

I

PD

I

I

N/A

N/A

N/A

N/A

CMC

I

I

I

N/A

N/A

I

Link-On

Z

Z

Z

N/A

N/A

N/A

CNA

Port State

Port State

N/A

N/A

N/A

N/A

GPIO

N/A

N/A

N/A

N/A

Z

N/A

† H – driven high, I – Input, L – driven low, N/A – not applicable, Z – high-impedance state

When the phy and/or the LLC device is not designed with internal bus holders, this bus-holder isolation scheme

can still be implemented with external bus holders. Figure 15 illustrates a circuit implementation where neither

the phy or the LLC have internal bus holders. External bus holders are provided on each side of the isolation

barrier by SN74ACT1071 10-bit bus termination array with bus-holding function ICs. One SN74ACT1071 on

each side of the isolation barrier would provide up to ten signals with bus holding functions.