LT3040 datasheet(17/30 Pages) AD

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LT3040

Rev. 0

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Minimize board leakage by encircling the VIN pin with a

guard ring operated at a potential close to itself—ideally

tied to the OUT pin. Guarding both sides of the circuit

board is recommended. Bulk leakage reduction depends

on the guard ring width. Leakages of 100nA into or out

of the VIN pin creates a 100µV error (with a 1kΩ resistor

connecting to VIN) in the reference voltage. Leakages of

this magnitude, coupled with other sources of leakage,

can cause significant errors in the output voltage, espe-

cially over wide operating temperature range. Figure 3

illustrates a typical guard ring layout technique.

Figure 3.

3040 F03

OUT

VIN

DD Package Guard Ring Layout

Since the VIN pin is a high impedance node, unwanted

signals may couple into the VIN pin and cause erratic

behavior. This is most noticeable when operating with

a minimum output capacitor at heavy load currents.

Bypassing the VIN pin with a small capacitance to ground

if allowed by the application resolves this issue—10nF is

normally sufficient.

Output Sensing

The LT3040’s VFB pin provides a Kelvin sense connection

to the output.

Additionally, as shown in Figure 4, it is very important for

stability to tie the VFB pin directly to the output capacitor

(COUT) and the GND side of the VIN pin capacitor (CIN)

directly to the GND side of COUT as well as keeping the

GND sides of supply capacitor (CV+) and COUT close

together. Refer to the PCB Layout Considerations section

for an example layout that meets these requirements.

Figure 4.

3040 TA04

V+

RFAULT

COUT

–

VIN

GND ILIM

EN/UV

V+

VIN

FAULT

RIN

RILIM

CIN

CV+

LT3040

VOUT

RLOAD

VFB

QPWR

OUT

QDRV

CIN and COUT Connections for Stability

The LT3040 requires an output capacitor for stability.

Given its high bandwidth (about 1MHz), ADI recommends

low ESR and ESL ceramic capacitors. A minimum 4.7µF

output capacitor with an ESR below 50mΩ and an ESL

below 2nH is required for stability. To minimize effects

of board inductances on the LT3040’s dynamic perfor-

mance, Kelvin connect the VFB pin directly to the output

capacitor as well as Kelvin connect the GND side of the VIN

pin capacitor (CIN) directly to the GND side of the output

capacitor. Also, tie the supply capacitor’s GND connec-

tion as close as possible to the output capacitor’s GND

connection.

Given the high PSRR and low noise performance attained

using a single 4.7µF ceramic output capacitor, larger val-

ues of output capacitor only marginally improves the

performance because the regulator bandwidth decreases

with increasing output capacitance — hence, there is little

to be gained by using larger than the minimum 4.7µF out-

put capacitor. Nonetheless, larger values of output capaci-

tance do decrease peak output deviations during a load

transient. Note that bypass capacitors used to decouple

individual components powered by the LT3040 increase

the effective output capacitance.

APPLICATIONS INFORMATION

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