LT3040 datasheet(23/30 Pages) AD

23 / 30 page

LT3040

Rev. 0

For more information www.analog.com

Figure 11.

COUT

–

VIN

GND ILIM

EN/UV

V+

VIN

FAULT

RIN

RILIM

CIN

LT3040

VOUT

IOUT(MAX) = 400mA

50m

V+

COUT

–

VIN

GND ILIM

EN/UV

V+

FAULT

RILIM

CV+

LT3040

VFB

QPWR

OUT

VFB

QPWR

OUT

3040 TA11

QDRV

Parallel Devices

The small worst-case offset of 0.3mV for each paral-

leled LT3040 minimizes the required ballast resistor

value. Figure 11 illustrates that two LT3040s, each using

a 50mΩ PCB trace ballast resistor, provide better than

20% accurate output current sharing at full load. The two

50mΩ external resistors only add 10mV of output regula-

tion drop with a 400mA maximum current. With a 3.3V

output, this only adds 0.3% to the regulation accuracy.

As has been discussed previously, tie the VFB pin directly

to the output capacitor.

More than two LT3040s can also be paralleled for even

higher output current and lower output noise. Paralleling

multiple LT3040s is also useful for distributing heat on the

PCB. For applications with high supply-to-output voltage

differential, an input series resistor or resistor in parallel

with the LT3040 can also be used to spread heat.

PCB Layout Considerations

Given the LT3040’s high bandwidth and ultrahigh PSRR,

careful PCB layout must be employed to achieve full

device performance. Figure 12 shows an example layout

that delivers full performance of the regulator. Refer to the

LT3040’s DC2783A demo board manual for further details.

Figure 12.

3040 F12

Example DFN Layout

Thermal Considerations

The LT3040 has internal power and thermal limiting cir-

cuits that protect the device under overload conditions.

The thermal shutdown temperature is nominally 162°C

with about 8°C of hysteresis. For continuous normal

load conditions, do not exceed the maximum junction

temperature, (125°C for E-, I-grades). It is important to

consider all sources of thermal resistance from junction to

ambient. This includes junction-to-case, case-to-heat sink

interface, heat sink resistance or circuit board-to-ambient

as the application dictates. Additionally, consider all heat

sources in close proximity to the LT3040.

The undersides of the DFN and MSOP packages have

exposed metal from the lead frame to the die attachment.

Both packages allow heat to directly transfer from the die

APPLICATIONS INFORMATION

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